RealECLTranslator.thy
Dragon Clock buffer circuit
Last Edited by: Gasbarro, October 10, 1984 9:14:12 am PDT
CIRCUIT[Lambda ← 1.0, Temp ← 25] = {
Vdd: node;
powerSupply: voltage[Vdd, Gnd]= 5.00;
! ThymeBasics.thy
! CMos2.0u25C.thy -- process file
-- N o d e s
AIn, nAIn: node;
PhA, nPhA: node;
N1, N2, N3, N4, N5, N6, N7, N8, N9, N10, N11: node;
Q1: PETran[N10,N1,N2,Vdd|l𡤂,w];
Q2: PETran[N11,N1,N3,Vdd|l𡤂,w];
Q3: NETran[N2,N2,N7,Gnd|l𡤂,w];
Q4: NETran[N2,N3,N8,Gnd|l𡤂,w];
Q5: PETran[N4,Vdd,N1,Vdd|l𡤂,w];
Q6: NETran[N3,nPhA,Gnd,Gnd|l𡤂,w];
Q7: PETran[N3,Vdd,nPhA,Vdd|l𡤂,w];
Q8: PETran[N4,Vdd,N4,Vdd|l𡤂,w];
Q9: NETran[nPhA,PhA,Gnd,Gnd|l𡤂,w];
Q10: PETran[nPhA,Vdd,PhA,Vdd|l𡤂,w];
Q11: NETran[Vdd,N4,N9,Gnd|l𡤂, w𡤄];
R1: resistor[Vdd,N1] = .5K;
R2: resistor[AIn,N10] = 1K;
R3: resistor[nAIn,N11] = 1K;
C1: capacitor[PhA,Gnd] = 50pF;
C2: capacitor[N2,Gnd] = 3.3pF;
C3: capacitor[N3,Gnd] = 3.5pF;
C4: capacitor[N10,Gnd] = 2pF;
C5: capacitor[N11,Gnd] = 2pF;
V1: voltage[N7,Gnd] = 0;
V2: voltage[N8,Gnd] = 0;
V3: voltage[N9,Gnd] = 0;
?: RectWave[AIn|OnLevel← 4V, OffLevel← 3.0V, period← 50ns, width← 25ns, tRise← 2ns,
tFall← 2ns, tDelay← 20ns];
?: RectWave[nAIn|OnLevel← 3.0V, OffLevel← 4V, period← 50ns, width← 25ns, tRise← 2ns,
tFall← 2ns, tDelay← 20ns];
};
plot["CMOS Clock Buffer, 25C, of October 5, 1984 3:41:37 pm PDT", : 1ns, -1, 6, AIn, nAIn, N2, N3, nPhA, PhA, N4, powerSupply^: -10mA, V1^: 1.0mA, V2^: 1.0mA, V3^: 1.0mA];
run[tMax ← 60ns, maxIter ← 2000];