*-----------------------------------------------------------
Title[ADefs.mc...October 28, 1983  4:33 PM...Taft];
* Common definitions for Alto and other emulators
*-----------------------------------------------------------


*-----------------------------------------------------------
* Base register assignments
* Available: 0-17, 25, 34, 35
*-----------------------------------------------------------

* BRs 0-3 are addressable as MemBX-relative registers.
* If the MemBX feature is used, registers [0..17] are committed.
* The other registers in [0..17] may be used as ordinary registers.
* All the MemBX-addressable registers are available for other emulators
* and are therefore not defined here.

* Display Word Task base registers.
* First 2 must be a pair differing only in MemBase.2
	BR[AChannelBR, 20];	* For A and B channels
	BR[BChannelBR, 24];
	BR[TChannelBR, 21];	* For Alto terminal emulation

* The following 2 must be an even-odd pair.
	BR[BBDstBR, 22];	* BitBlt destination base register
	BR[BBSrcBR, 23];	* BitBlt source base register

	BR[ScratchBR, 26];	* Emulator general-purpose scratch register

	BR[PCHistBR, 27];	* Base of histogram for PC sampling

	BR[DiskBR, 30];		* Disk task base register
:If[AltoMode];		********** Alto version **********
	BR[ECBR, 31];		* Ethernet Command base register
:EndIf;			**********************************
	BR[EIBR, 32];		* Ethernet Input base register
	BR[EOBR, 33];		* Ethernet Output base register

* BRs 34-37 are addressable from the IFU
	BR[MDS, 36];		* {mds, 0} for Alto and Mesa Emulators,
				* must be CODE xor 1
	BR[Code, 37];		* IFU code BR

:If[AltoMode];		********** Alto version **********
	BR[IOBR, IP[MDS]];	* I/O region same as MDS
:Else;			******** PrincOps version ********
	BR[IOBR, 31];		* I/O region is first 64K, not MDS
:EndIf;			**********************************

*-----------------------------------------------------------
* Task numbers
*-----------------------------------------------------------

	TaskN[AUT, 1];		* Asynchronous utility task
	TaskN[JNK, 2];		* Junk task
	TaskN[DHT, 3];		* Display horizontal task
	TaskN[AHT, 4];		* Alto terminal horizontal task
	TaskN[EOT, 6];		* Ether Output task
	TaskN[EIT, 7];		* Ether Input task
	TaskN[AWT, 11];		* Alto terminal word task
	TaskN[TSKSIM, 12];	* Task simulator task
	TaskN[DWT, 13];		* Display word task
	TaskN[DSK, 14];		* Disk task


*-----------------------------------------------------------
* Miscellaneous constants
*-----------------------------------------------------------

:If[AltoMode];		********** Alto version **********
	MC[DoneStatus, 7400];
	MC[ACmmdSeal, 44000];

* Instruction set number for Alto emulator
	Set[AEmuInsSet, 0];	* Must be 0 or 1

* StkP values for accumulators
	Set[nspAC0, 1];
	Set[nspAC1, 2];
	Set[nspAC2, 3];
	Set[nspAC3, 4];

	RME[RR3, spAC2];	* The R-register whose contents are 3
:EndIf;			**********************************

*-----------------------------------------------------------
* IM placement constants
* These define most absolutely-placed instructions in Alto emulator and I/O
* microcode, but do not include definitions for other emulators.
*-----------------------------------------------------------

* These addresses are public (e.g., known by BaseBoard or Bootstrap)
	Set[InitMapLoc, 1076];	* Emulator boot (2 or 3-button boot)
	Set[LoadRamPage, 76];	* Page reserved for LoadRam microcode
:If[AltoMode];		********** Alto version **********
	Set[RestartEmulatorLoc, 1070]; * Emulator soft-restart
	Set[MBEmulatorLoc, 1072]; * Emulator for running midas loaded file
:Else;			******** PrincOps version ********
	Set[BootOrStartLoc, 1070]; * .eb file starting address
:EndIf;			**********************************

:If[AltoMode];		********** Alto version **********
* Alto emulator
	Set[SD400, 3100];	* 400-way dispatch on DIR (S-Group)
	Set[BcplZ300X, 2640];	* 40-way dispatch
	Set[BcplZ340X, 2740];	* 40-way dispatch
:EndIf;			**********************************


*-----------------------------------------------------------
* Miscellaneous macro definitions
*-----------------------------------------------------------

M[Nop, Branch[.+1]];

* These macros take an existing full-word integer (defined by SET),
* constant (defined by MC), or list of up to 9 integers and/or
* constants to be summed, extract the high or low byte, and return
* the result as a constant that may be used in an instruction without
* further qualification.
M[HighByte, And[177400, DPS[#1,#2,#3,#4,#5,#6,#7,#8,#9]]C];
M[LowByte, And[377, DPS[#1,#2,#3,#4,#5,#6,#7,#8,#9]]C];


* Macro Dec[a,b,c,d] returns the value of the decimal number abcd,
* where a,b,c,d are decimal digits.
M[Dec, Add[X1000[#1], X100[#2], X10[#3], #4]];
M[X10, LShift[Add[LShift[#1, 2], #1], 1]];
M[X100, LShift[Add[LShift[Add[#1, #1, #1], 3], #1], 2]];
M[X1000, LShift[Add[LShift[Sub[LShift[#1, 5], #1], 2], #1], 3]];
Set[8, 10]; Set[9, 11];


* MaskSize[mask] and MaskPos[mask] return, respectively, the width and the
* number of bits to the right of the mask.  For example, if mask=1760,
* MaskSize[mask]=6 and MaskPos[mask]=4.  These values are suitable
* for calls to shifter macros.
M[MaskPos,
  Set[T1@, Not[#1]] Set[T2@, 0]
  While[And[T1@, 1], Set[T1@, RShift[T1@, 1]] Set[T2@, Add[T2@, 1]]]
  T2@];
M[MaskSize,
  Set[T3@, MaskPos[#1]]  * Leaves Not[#1] right-justified as a side-effect
  MaskPos[T1@]];