{File name: FixedMisc.mc
Description: Miscellaneous Mesa opcodes,
Author: R. Garner,
Created: April 3, 1980,
Edited: Sandman, April 23, 1981 8:46 AM: Fix Stack on Misc ~IN[0..15]
Last Edited: Jim Frandeen, March 16, 1981 11:51 AM: Allow Block to catch Checksum Misc
Last Edited: Johnsson, January 22, 1981 1:11 PM
LastEdited: Sturgis 26-Jul-83 13:39:13}
{——————————————————————————————————————————————————————
MISC - Miscellaneous operations
——————————————————————————————————————————————————————}
@MISC:Xbus ← ibHigh, XDisp,c1, opcode[364’b];
Rx ← ib, XDisp, push, DISP4[MiscHigh],c2;
STK ← TOS, pop, DISP4[Misc0n],c3, at[0,10,MiscHigh];
@ASSOC:TT ← TOS{map entry} LRot8,c1, at[0,10,Misc0n];
T ← STK, pop,c2;
rhT ← T ← T LRot8,c3;
PC ← PC + 1,c1;
Noop,c2;
MapCommon:Xbus ← TT LRot12, XDisp,c3;
AssocStore:Map ← [rhT,T], T ← 80, DISP4[AS0,8],c1;
AS0:MDR ← TT and ~T, IBDisp, GOTO[SLTail],c2, at[08,10,AS0];
MDR ← TT and ~T, IBDisp, GOTO[SLTail],c2, at[09,10,AS0];
MDR ← TT or T, IBDisp, GOTO[SLTail],c2, at[0A,10,AS0];
MDR ← TT or T, IBDisp, GOTO[SLTail],c2, at[0B,10,AS0];
MDR ← TT and ~T, IBDisp, GOTO[SLTail],c2, at[0C,10,AS0];
MDR ← TT and ~T, IBDisp, GOTO[SLTail],c2, at[0D,10,AS0];
MDR ← TT and ~T, IBDisp, GOTO[SLTail],c2, at[0E,10,AS0];
MDR ← TT or T, IBDisp, GOTO[SLTail],c2, at[0F,10,AS0];
@SETF:T ← STK, fXpop, fZpop, push,c1, at[1,10,Misc0n];
Rx ← ~80, L0←0,c2;
SetGetCom:PC ← PC + 1,c3;
Q ← ~0F,c1;
rhT ← T ← T LRot8,c2;
TT ← TOS{map entry} LRot8,c3;
Map ← [rhT,T],c1;
TT ← TT and 70, L0Disp,c2;
TOS ← Rx{~80} and MD{turn off dp}, BRANCH[$, GetfTail],c3;
Rx ← TOS LRot12 and Q, XDisp{disp old flags},c1;
Rx ← Rx LRot4, DISP4[Setf0,8],c2;
Setf0:TT ← Rx or TT, GOTO[SetfStore],c3, at[08,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[09,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[0A,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[0B,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[0C,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[0D,10,Setf0];
TT ← Rx or 60, GOTO[SetfStore],c3, at[0E,10,Setf0];
TT ← Rx or TT, GOTO[SetfStore],c3, at[0F,10,Setf0];
SetfStore:TOS ← TOS LRot8,c1;
STK ← TOS, GOTO[MapCommon],c2;
@GETF:T ← TOS{page number}, L0←1, pop,c1, at[0E,10,Misc0n];
Rx ← ~80, push, GOTO[SetGetCom],c2;
GetfTail:TOS ← TOS LRot8, GOTO[IBDispOnly],c1;
@RCLK:{must read all three clock regs in single click}
TOS ← uClockHigh, push,c1, at[9,10,Misc0n];
T ← RShift1 uClockBits, SE←0, push,c2;
TT ← uClockLow,c3;
TT ← TT + T, CarryBr, push, fZpop,c1;
STK ← TT, IBDisp, PC ← PC + 1, BRANCH[RCLKnc, RCLKc],c2;
RCLKnc:DISPNI[OpTable],c3;
RCLKc:TOS ← TOS + 1, DISPNI[OpTable],c3;
@SETMP:PC ← PC + PC16,{+PC16 at SLns} fXpop, push,c1, at[8,10,Misc0n];
rhTT ← TT ← uIOPage,c2;
TT ← TT + 40,c3;
MAR ← [rhTT,TT+0], push{popped at SLns}, GOTO[SLns],c1;
@INPUT:PC ← PC + 1, Xbus ← TOS LRot0, XDisp,c1, at[5,10,Misc0n];
fXpop, push, Ybus ← 0, EtherDisp, DISP4[Input],c2;
Input:TOS ← EIData, CANCELBR[MiscDone,3],c3, at[0,10,Input];
TOS ← EStatus, CANCELBR[MiscDone,3],c3, at[1,10,Input];
TOS ← KIData, CANCELBR[MiscDone,3],c3, at[2,10,Input];
TOS ← KStatus, CANCELBR[MiscDone,3],c3, at[3,10,Input];
KStrobe, CANCELBR[MiscDone,3],c3, at[4,10,Input];
TOS ← MStatus, CANCELBR[MiscDone,3],c3, at[5,10,Input];
TOS ← KTest, CANCELBR[MiscDone,3],c3, at[6,10,Input];
TOS ← IOPIData, CANCELBR[MiscDone,3],c3, at[8,10,Input];
TOS ← IOPStatus, CANCELBR[MiscDone,3],c3, at[9,10,Input];
BRANCH[Ether, NoEther, 1],c3, at[0A,10,Input];
Ether:TOS ← 1, GOTO[IBDispOnly],c1;
NoEther:TOS ← 0, GOTO[IBDispOnly],c1;
MiscDone:GOTO[IBDispOnly],c1;
@OUTPUT:T ← STK, pop,c1, at[6,10,Misc0n];
PC ← PC + 1, Xbus ← TOS LRot0, XDisp,c2;
TOS ← STK, pop, DISP4[Output],c3;
Output:IOPOData ← T LRot0, GOTO[IBDispOnly],c1, at[0,10,Output];
IOPCtl ← T LRot0, GOTO[IBDispOnly],c1, at[1,10,Output];
KOData ← T LRot0, GOTO[IBDispOnly],c1, at[2,10,Output];
KCtl ← T LRot0, GOTO[IBDispOnly],c1, at[3,10,Output];
EOData ← T LRot0, GOTO[IBDispOnly],c1, at[4,10,Output];
EICtl ← T LRot0, GOTO[IBDispOnly],c1, at[5,10,Output];
DCtlFifo ← T, GOTO[IBDispOnly],c1, at[6,10,Output];
DCtl ← T LRot0, GOTO[IBDispOnly],c1, at[7,10,Output];
DBorder ← T, GOTO[IBDispOnly],c1, at[8,10,Output];
PCtl ← T LRot0, GOTO[IBDispOnly],c1, at[9,10,Output];
MCtl ← T, GOTO[IBDispOnly],c1, at[0A,10,Output];
EStrobe, GOTO[IBDispOnly],c1, at[0B,10,Output];
EOCtl ← T LRot0, GOTO[IBDispOnly],c1, at[0C,10,Output];
KCmd ← T LRot0, GOTO[IBDispOnly],c1, at[0D,10,Output];
POData ← T LRot0, GOTO[IBDispOnly],c1, at[0F,10,Output];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {ReadRam}c1, at[2,10,Misc0n];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {LoadRam}c1, at[3,10,Misc0n];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2],c1, at[4,10,Misc0n];
{T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {ChkSum}c1, at[7,10,Misc0n];}
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {RPRINTER}c1, at[0A,10,Misc0n];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {WPRINTER}c1, at[0B,10,Misc0n];
IfEqual[Config, 1, SkipTo[BandBlt], ];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {BANDBLT}c1, at[0C,10,Misc0n];
BandBlt!
IfEqual[Config, 1, , SkipTo[TextBlt]];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2], {TEXTBLT}c1, at[0D,10,Misc0n];
TextBlt!
MiscF:T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[Trapc2],c1, at[0F,10,Misc0n];
{Unimplemented Misc Groups}
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[1,10,MiscHigh]; {fpt}
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[2,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[3,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[4,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[5,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[6,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[7,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[8,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[9,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[0A,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[0B,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[0C,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[0D,10,MiscHigh];
STK ← TOS, pop, CANCELBR[MiscF, 0F],c3, at[0F,10,MiscHigh];
{——————————————————————————————————————————————————————
WR - Write Register
——————————————————————————————————————————————————————}
{Timing - 2 clicks}
@WR:Xbus←ib, PC ← PC + 1, push, XDisp,c1, opcode[374’b];
STK ← TOS, T ← 0FF, pop, DISP4[WR1],c2;
WR0:uPSB ← TOS, GOTO[WRTail],c3, at[0,10,WR1];
WR1:uWDC ← TOS and T, GOTO[WRTail],c3, at[1,10,WR1];
WR2:uXTS ← TOS, GOTO[WRTail],c3, at[2,10,WR1];
WR3:UvMDS ← TOS,c3, at[3,10,WR1];
rhMDS ← UvMDS,c1;
L ← UvL,c2;
G ← UvG,c3;
Map ← Q ← [rhMDS, L],c1;
T ← Q and 0FF,c2;
L ← rhL ← MD,c3;
Map ← Q ← [rhMDS, G],c1;
L ← L and ~0FF,c2;
G ← rhG ← MD,c3;
MAR ← G ← [rhG, Q+0],c1;
L ← L or T, IBDisp, GOTO[SLTail],c2;
WR8:uPTC ← TOS, GOTO[WRTail],c3, at[8,10,WR1];
WRTail:TOS ← STK, pop, GOTO[IBDispOnly],c1;
{——————————————————————————————————————————————————————
RR - Read Register
——————————————————————————————————————————————————————}
{Timing - 1 click}
@RR:T←ib, push, XDisp,c1, opcode[375’b];
STK ← TOS, PC ← PC+1, IBDisp, push, fZpop, DISP4[RR1],c2;
RR0:TOS ← uPSB, DISPNI[OpTable],c3, at[0,10,RR1];
RR1:TOS ← uWDC, DISPNI[OpTable],c3, at[1,10,RR1];
RR2:TOS ← uXTS, DISPNI[OpTable],c3, at[2,10,RR1];
RR3:TOS ← UTrapParm{XTP}, DISPNI[OpTable],c3, at[3,10,RR1];
RR6:TOS ← UvMDS, DISPNI[OpTable],c3, at[6,10,RR1];
RR8:TOS ← uPTC{PTC}, DISPNI[OpTable],c3, at[8,10,RR1];
{——————————————————————————————————————————————————————
Unimplemented Opcodes
——————————————————————————————————————————————————————}
Unimplemented:
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[75’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[76’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[77’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[174’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[175’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[176’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[177’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[271’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[272’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[273’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[274’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[275’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[276’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[277’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[355’b];
@STOP: T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[362’b]; {STOP}
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[366’b]; {STARTIO}
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[367’b]; {JRAM}
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[373’b];
T ← sUnimplemented, L2←L2.TRAPStashr, GOTO[UnimpContinue],c1, opcode[377’b];
UnimpContinue:
push,c2;
STK ← TOS, pop,c3;
GOTO[Trapc2],c1;
{edit log
September 1, 1982 11:32 AM: Sturgis: save TOS in STK before trapping unimplimented main op codes
RTE: September 1, 1982 12:12 PM: must push, then STK←TOS, pop
RTE: September 2, 1982 4:42 PM: modify floating point trap code to act like other unimplementied misc ops
Remark: 2-Jun-83 14:44:13: remove 271 and 272 from the unIMplemented ops.
Remark: 2-Jun-83 16:53:44: removed the above ops from wrong file, put them back in.
18-Jul-83 9:58:03: add Input[6] case (TOS ← KTest).
26-Jul-83 13:39:49: RTE: at previous fix, I added TOS ← KStatus, instead of intended TOS ← KTest.
}