{File name:  <Workstation>mc>ST2MMisc.mc
Description: Miscellaneous Mesa  opcodes,
Author: R. Garner,
Created: April 3, 1980,
Last Edited: Makoto Udagawa, 13-Feb-85 15:31:27 Remove ESC 84, 85, 86, 8A, 8B, 8C, 8D opcode for smalltalk.
Last Edited: I. Yamaura:27-Nov-84 18:52:27: Change for2M Words at {+++}
Last Edited: Amy Fasnacht, 31-Aug-83 10:50:05 Move IOPage for larger VM
Last Edited: Daniels, 15-Jun-83 19:01:49 new instruction set
Last Edited: Amy Fasnacht,  4-Jan-83 10:52:30 Fix typo in BLTLR comment
Last Edited: Amy Fasnacht, 22-Dec-82 10:49:15 Make BLTLR microcode implementation
Last Edited: Amy Fasnacht, September 2, 1982  12:19 PM Do STK_TOS at Unimplemented Opcodes
Last Edited: Amy Fasnacht, August 2, 1982  11:41 AM MaintenancePanelOffset
Last Edited: Amy Fasnacht, April 29, 1982  1:48 PM Add TStatus to @INPUT and TAddr to @OUTPUT
Last Edited: Amy Fasnacht, April 23, 1982  2:01 PM  Add conditional assembly for MagTape
Edited: Sandman, February 24, 1982  2:18 PM Add SPP inst
Edited: Sandman, November 17, 1981  5:04 PM new instruction set
Edited: Sandman, April 23, 1981  8:46 AM: Fix Stack on Misc ~IN[0..15]
Last Edited: Jim Frandeen, March 16, 1981  11:51 AM: Allow Block to catch Checksum Misc
Last Edited: Johnsson, January 22, 1981  1:11 PM}

{Assembly Configs:

Config#		File
0	Mesa.db
1	RavenMesa.db
2	TridentMesa.db
3	TridentRavenMesa.db
4	MagTapeMesa.db
5	TridentMagTapeMesa.db}

{*****************************************************************************
	ESC(L) - Escape operations
*****************************************************************************}

@ESCL:	Xbus _ ibHigh, XDisp, GOTO[ESCx],		c1, opcode[371'b];

@ESC:	Xbus _ ibHigh, XDisp,				c1, opcode[370'b];
ESCx:	TT _ ib, XDisp, push, DISP4[ESCHi],			c2;
	PC _ PC + 1, STK _ TOS, pop, DISP4[ESC0n],	c3, at[0,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, DISP4[ESC1n],	c3, at[1,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, DISP4[ESC2n],	c3, at[2,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[3,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[4,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[5,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[6,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, DISP4[ESC7n],	c3, at[7,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, DISP4[ESC8n],	c3, at[8,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[9,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0A,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0B,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0C,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0D,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0E,10,ESCHi];
	PC _ PC + 1, STK _ TOS, pop, CANCELBR[ESCa,0F],	c3, at[0F,10,ESCHi];

ESCa:	PC _ PC - 1,							c1;
ESCb:	T _ 0FF + TT + 1,						c2;
ESCc:	G _ 1, GOTO[Trapc1],						c3;

ESC0n:	PC _ PC - 1, GOTO[ESCb],			c1, at[0,10,ESC0n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[1,10,ESC0n];
	{@MW in Process					c1, at[2,10,ESC0n];}
	{@MR in Process					c1, at[3,10,ESC0n];}
	{@NC in Process					c1, at[4,10,ESC0n];}
	{@BC in Process					c1, at[5,10,ESC0n];}
	{@REQ in Process				c1, at[6,10,ESC0n];}
	{@SM in Misc					c1, at[7,10,ESC0n];}
	{@SMF in Misc					c1, at[8,10,ESC0n];}
	{@GMF in Misc					c1, at[9,10,ESC0n];}
	{@AF in Xfer					c1, at[0A,10,ESC0n];}
	{@FF in Xfer					c1, at[0B,10,ESC0n];}
	{@PI in Xfer					c1, at[0C,10,ESC0n];}
	{@PO in Xfer					c1, at[0D,10,ESC0n];}
	{@POR in Xfer					c1, at[0E,10,ESC0n];}
	{@SPP in Process				c1, at[0F,10,ESC0n];}

	{@DI in Xfer					c1, at[0,10,ESC1n];}
	{@EI in Xfer					c1, at[1,10,ESC1n];}
	{@XOR in Stack					c1, at[2,10,ESC1n];}
	{@DAND in Stack					c1, at[3,10,ESC1n];}
	{@DIOR in Stack					c1, at[4,10,ESC1n];}
	{@DXOR in Stack					c1, at[5,10,ESC1n];}
	{@ROTATE in Stack				c1, at[6,10,ESC1n];}
	{@DSHIFT in Stack				c1, at[7,10,ESC1n];}
	{@LINT in Stack					c1, at[8,10,ESC1n];}
	{@JS in Jump					c1, at[9,10,ESC1n];}
	{@RCFS in StringField				c1, at[0A,10,ESC1n];}
	{@RC in Read					c1, at[0B,10,ESC1n];}
	{@UDIV in Stack					c1, at[0C,10,ESC1n];}
	{@LUDIV in Stack				c1, at[0D,10,ESC1n];}
	{@ROB in Read					c1, at[0E,10,ESC1n];}
	{@WOB in Write					c1, at[0F,10,ESC1n];}

	{@DSK in Xfer					c1, at[0,10,ESC2n];}
	{@XE in Xfer					c1, at[1,10,ESC2n];}
	{@XF in Xfer					c1, at[2,10,ESC2n];}
	{@LSK in Xfer					c1, at[3,10,ESC2n];}
	{@BNDCKL in Stack				c1, at[4,10,ESC2n];}
	{@NILCK in Stack				c1, at[5,10,ESC2n];}
	{@NILCKL in Stack				c1, at[6,10,ESC2n];}
	{@BLTLR in Block				c1, at[7,10,ESC2n];}
	{@BLEL in Block					c1, at[8,10,ESC2n];}
	{@BLECL in Block				c1, at[9,10,ESC2n];}
	{@CKSUM in Block				c1, at[0A,10,ESC2n];}
	{@BITBLT in BBInit				c1, at[0B,10,ESC2n];}

IfEqual[Config, 0, SkipTo[TextBltImpl], ];

@TXTBLT:
	PC _ PC - 1, GOTO[ESCb],			c1, at[0C,10,ESC2n];

TextBltImpl!

@BYTBLT:
	PC _ PC - 1, GOTO[ESCb],			c1, at[0D,10,ESC2n];
@BYTBLTR:
	PC _ PC - 1, GOTO[ESCb],			c1, at[0E,10,ESC2n];
@VERSION:
	PC _ PC - 1, GOTO[ESCb],			c1, at[0F,10,ESC2n];

@a177:	PC _ PC - 1, GOTO[ESCb],			c1, at[0F,10,ESC7n];

	{@INPUT in Misc					c1, at[0,10,ESC8n];}
	{@OUTPUT in Misc				c1, at[1,10,ESC8n];}
@LOADRAMJ:
	PC _ PC - 1, GOTO[ESCb],			c1, at[2,10,ESC8n];

IfEqual[Config, 1, SkipTo[BandBltImpl], ];
IfEqual[Config, 3, SkipTo[BandBltImpl], ];

@BANDBLT:
	PC _ PC - 1, GOTO[ESCb],			c1, at[3,10,ESC8n];

BandBltImpl!

{4, 5, 6 for smalltalk}
{	PC _ PC - 1, GOTO[ESCb],			c1, at[4,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[5,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[6,10,ESC8n];}
	PC _ PC - 1, GOTO[ESCb],			c1, at[7,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[8,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[9,10,ESC8n];
	{a, b, c , and d removed for smalltalk memory access}
{	PC _ PC - 1, GOTO[ESCb],			c1, at[0A,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[0B,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[0C,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[0D,10,ESC8n];}
	PC _ PC - 1, GOTO[ESCb],			c1, at[0E,10,ESC8n];
	PC _ PC - 1, GOTO[ESCb],			c1, at[0F,10,ESC8n];



{*****************************************************************************
	SM	Set Map
*****************************************************************************}

@SM:	TOS{map flags} _ TOS and 7, pop,		c1, at[7,10,ESC0n];
	TT{real page} _ STK, pop,			c2;
	TT _ TT LRot8,XRefBr,				c3;	{+++ Change for 2M +++}

	BRANCH[SMe, SMf],{check ext adr bit}		c1;	{+++ Change for 2M +++}
SMe:	TT _ TT and ~80,GOTO[SMg],			c2;	{+++ Change for 2M +++}
SMf:	TT _ TT or 80,{add ext adr bit}			c2;	{+++ Change for 2M +++}
SMg:	Noop,						c3;	{+++ Change for 2M +++}


	Xbus _ STK, pop,				c1;
	T{virtual page} _ STK, pop, 			c2;
	rhT _ T _ T LRot8,				c3;

	TOS{map flags} _ TOS LRot4, fXpop, push,	c1;
	TT{real page} _ TT and ~70,			c2;	{+++ Change for 2M +++}
	TT _ TT or TOS,					c3;	{+++ Change for 2M +++}

SMd:	Map _ [rhT,T],					c1;	{+++ Change for 2M +++}
	MDR _ TT, IBDisp, GOTO[SLa],			c2;	{+++ Change for 2M +++}



{*****************************************************************************
	SMF	Set Map Flags
*****************************************************************************}

@SMF:	pop, L0_0,					c1, at[8,10,ESC0n];
	T{virtual page} _ STK, pop,					c2;
SMFa:	TOS{new map flags} _ TOS and 7, fXpop, push,			c3;

	rhT _ T _ T LRot8,						c1;
	Noop,								c2;	{+++ Change for 2M +++}
	TT{new map flags} _ TOS LRot4,					c3;

	Map _ [rhT,T],							c1;
	Noop,								c2;	{+++ Change for 2M +++}
	TOS{old map entry} _ MD,					c3;	{+++ Change for 2M +++}

	Rx{old map flags} _ TOS LRot12, XDisp,				c1;
	TOS _ TOS and ~70, DISP4[SMFb,8],				c2;	{+++ Change for 2M +++}
SMFb:	TT _ TOS or TT, GOTO[SMFc],			c3, at[08,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[09,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[0A,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[0B,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[0C,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[0D,10,SMFb];
	TT _ TOS or 60, GOTO[SMFc],			c3, at[0E,10,SMFb];
	TT _ TOS or TT, GOTO[SMFc],			c3, at[0F,10,SMFb];

SMFc:	[] _ TOS LRot0, XLDisp,	{check ext adr bit}			c1;	{+++ Change for 2M +++}
	TOS _ TOS and ~80,BRANCH[SMFe,SMFf,1],				c2;	{+++ Change for 2M +++}
SMFe:	GOTO[SMFg],							c3;	{+++ Change for 2M +++}
SMFf:	TOS _ TOS or 10,{add ext adr bit}GOTO[SMFg],			c3;	{+++ Change for 2M +++}

SMFg:	Rx{old map flags} _ Rx and 7,					c1;	{+++ Change for 2M +++}
	TOS _ TOS LRot8, push,						c2;
	STK _ Rx, push, L0Disp,						c3;

	STK _ TOS, push,BRANCH[SMFd, GMFa],				c1;
SMFd:	STK _ 0,							c2;
	GOTO[SMd],							c3;


{*****************************************************************************
	GMF	Get Map Flags
*****************************************************************************}

@GMF:	T{virtual page} _ STK, pop, L0_1,		c1, at[9,10,ESC0n];
	GOTO[SMFa],							c2;

GMFa:	STK _ 0, IBDisp, GOTO[SLa],					c2;


{*****************************************************************************
	INPUT	Input
*****************************************************************************}

@INPUT:	Ybus _ TOS, YDisp,				c1, at[0,10,ESC8n];
	fXpop, push, IBDisp, DISP4[Input],				c2;
Input:	TOS _ EIData, DISPNI[OpTable],			c3, at[0,10,Input];
	TOS _ EStatus, DISPNI[OpTable],			c3, at[1,10,Input];
	TOS _ KIData, DISPNI[OpTable],			c3, at[2,10,Input];
	TOS _ KStatus, DISPNI[OpTable],			c3, at[3,10,Input];
	TOS _ MStatus, DISPNI[OpTable],			c3, at[5,10,Input];
	TOS _ KTest, DISPNI[OpTable],			c3, at[6,10,Input];
	TOS _ IOPIData, DISPNI[OpTable],		c3, at[8,10,Input];
	TOS _ IOPStatus, DISPNI[OpTable],		c3, at[9,10,Input];
	TOS _ TStatus, DISPNI[OpTable],			c3, at[0A,10,Input];


{*****************************************************************************
	OUTPUT	Output
*****************************************************************************}

@OUTPUT:
	T _ STK, pop, Ybus _ TOS, YDisp,		c1, at[1,10,ESC8n];
	TOS _ STK, pop, IBDisp, DISP4[Output],				c2;

Output:	IOPOData _ T LRot0, DISPNI[OpTable],		c3, at[0,10,Output];
	IOPCtl _ T LRot0, DISPNI[OpTable],		c3, at[1,10,Output];
	KOData _ T LRot0, DISPNI[OpTable],		c3, at[2,10,Output];
	KCtl _ T LRot0, DISPNI[OpTable],		c3, at[3,10,Output];
	EOData _ T LRot0, DISPNI[OpTable],		c3, at[4,10,Output];
	EICtl _ T LRot0, DISPNI[OpTable],		c3, at[5,10,Output];
	PCtl _ T LRot0, DISPNI[OpTable],		c3, at[9,10,Output];
	MCtl _ T, DISPNI[OpTable],			c3, at[0A,10,Output];
	EOCtl _ T LRot0, DISPNI[OpTable],		c3, at[0C,10,Output];
	KCmd _ T LRot0, DISPNI[OpTable],		c3, at[0D,10,Output];
	TAddr _ T LRot0, DISPNI[OpTable],		c3, at[0E,10,Output];
	POData _ T LRot0, DISPNI[OpTable],		c3, at[0F,10,Output];


{*****************************************************************************
	WR - Write Registers
*****************************************************************************}

@WRPSB:	uPSB _ TOS,					c1, at[0,10,ESC7n];
WRx:	TOS _ STK, pop, IBDisp, GOTO[DISPNIonly],		c2;

@WRMDS:	UvMDS _ TOS, L0 _ 0,				c1, at[1,10,ESC7n];
	Q _ UvL,						c2;
WRMDSc:	rhMDS _ UvMDS,						c3;

	Map _ Q _ [rhMDS, Q], L0Disp,				c1;
	BRANCH[WRMDSa, WRMDSb],					c2;
WRMDSa:	L _ rhL _ MD,						c3;

	MAR _ L _ [rhL, Q+0],					c1;
	Q _ UvG, L0 _ 1, GOTO[WRMDSc],				c2;

WRMDSb:	G _ rhG _ MD,						c3;

	MAR _ G _ [rhG, Q+0], GOTO[WRx],			c1;

@WRWP:	uWP _ TOS, GOTO[WRx],				c1, at[2,10,ESC7n];

@WRWDC:	uWDC _ TOS, GOTO[WRx],				c1, at[3,10,ESC7n];

@WRPTC:	uPTC _ TOS, GOTO[WRx],				c1, at[4,10,ESC7n];

@WRIT:	T _ STK, pop,					c1, at[5,10,ESC7n];
	TT _ TOS,						c2;
	TOS _ STK, pop,						c3;

	{must write all three clock regs in single click}
	uClockHigh _ TT,					c1;
	uClockLow _ T, IBDisp,					c2;
	uClockBits _ 0, DISPNI[OpTable],			c3;


@WRXTS:	uXTS _ TOS, GOTO[WRx],					c1, at[6,10,ESC7n];

@WRMP:	Rx _ uIOPage,						c1, at[7,10,ESC7n];
	Q _ MaintenancePanelOffset,				c2;
	rhRx _ IOPageHigh,					c3;

	MAR _ [rhRx, Q + 0],					c1;
	MDR _ TOS, IBDisp, GOTO[SLa],				c2;
	

{*****************************************************************************
	RR - Read Registers
*****************************************************************************}

@RRPSB:	TOS _ uPSB, push, GOTO[RRx],			c1, at[8,10,ESC7n];
RRx:	push, fZpop, IBDisp, GOTO[DISPNIonly],			c2;

@RRMDS:	TOS _ UvMDS, push, GOTO[RRx],			c1, at[9,10,ESC7n];

@RRWP:	TOS _ uWP, push, GOTO[RRx],			c1, at[0A,10,ESC7n];
@RRWDC:	TOS _ uWDC, push, GOTO[RRx],			c1, at[0B,10,ESC7n];
@RRPTC:	TOS _ uPTC, push, GOTO[RRx],			c1, at[0C,10,ESC7n];
@RRXTS:	TOS _ uXTS, push, GOTO[RRx],			c1, at[0E,10,ESC7n];
@RRIT:	Q _ uClockHigh, push,				c1, at[0D,10,ESC7n];
	TOS _ RShift1 uClockBits, SE_0,				c2;
	TT _ uClockLow, push, GOTO[ADCa],			c3;


{*****************************************************************************
	Unimplemented Opcodes
*****************************************************************************}

Unimp:	TT _ 76'b, push, GOTO[OpcodeTrap],			c1, opcode[76'b];
	TT _ 77'b, push, GOTO[OpcodeTrap],			c1, opcode[77'b];
	TT _ 175'b, push, GOTO[OpcodeTrap],			c1, opcode[175'b];
	TT _ 176'b, push, GOTO[OpcodeTrap],			c1, opcode[176'b];
	TT _ 177'b, push, GOTO[OpcodeTrap],			c1, opcode[177'b];
	TT _ 277'b, push, GOTO[OpcodeTrap],			c1, opcode[277'b];
	TT _ 372'b, push, GOTO[OpcodeTrap],			c1, opcode[372'b];
	TT _ 373'b, push, GOTO[OpcodeTrap],			c1, opcode[373'b];
	TT _ 374'b, push, GOTO[OpcodeTrap],			c1, opcode[374'b];
	TT _ 375'b, push, GOTO[OpcodeTrap],			c1, opcode[375'b];
	TT _ 376'b, push, GOTO[OpcodeTrap],			c1, opcode[376'b];
OpcodeTrap:
	T _ sOpcodeTrap, STK _ TOS, pop, GOTO[ESCc],			c2;


	{ E N D }