{
file: <CoPilot>DLion>MBusB1.mc
Last edited: 19-Nov-86  9:23:03

Copyright (C) 1985, 1986 by Xerox Corporation.  All rights reserved.

This code goes into bank 1, but some opcodes complete in bank 0 MBusB0.mc.
}

{protect "low cp", used by multi bank boot code}
{high cp, used by kernel, already protected in this bank by StartMesa.mc}

Reserve[1,07F];

{Handle misc groups 60b to 77b, 100'b to 117'b, and 140'b to 157'b.
The preceding microinstructions were:

@MISC:	Xbus ← ibHigh, XDisp,			c1, opcode 364'b;
	Rx ← ib, XDisp, push, DISP4[MiscHigh,8];

Misc4m:	STK ← TOS, pop, DISP4[Misc4n],		c3, at[4, 10, MiscHigh];

Opcodes implemented here are:
	{106'b is WriteL for Jim Gasbarro}
	{107'b is WriteM for Jim Gasbarro}
	{110'b is ReadL for Jim Gasbarro}
	{111'b is ReadM for Jim Gasbarro}
	{112'b is WriteMBus for Tim Diebert}
	{113'b is ReadMBus for Tim Diebert}
	{114'b is WritePCBus for Mick Lamming}
	{115'b is ReadPCBus for Mick Lamming}
}

{***************************************************************************
aWriteL
****************************************************************************}
@WriteL:	{misc 106'b}
	T ← STK, 						c1, at[06, 10, Misc4n];
	stackP ← T, Rx{stackP} ← ~ErrnIBnStkp,			c2;
	PC ← PC + 1, FloatNop {Free BX in 2 BX cycles},		c3;
	
	FloatNop,						c1;
	FloatULS, Xbus{BXL[stackP]} ← TOS LRot0,		c2;
WriteLM3:
	stackP ← Rx{stackP} - 1,				c3;
	Noop,							c1;
	TOS ← STK, pop, IBDisp, GOTO[DISPNIonly],		c2;


{**************************************************************************
aWriteM
**************************************************************************}
@WriteM: {misc 107'b}
	T ← STK, 						c1, at[07, 10, Misc4n];
	stackP ← T, Rx{stackP} ← ~ErrnIBnStkp,			c2;
	PC ← PC + 1, FloatNop {Free BX in 2 BX cycles},		c3;
	
	FloatNop,						c1;
	FloatUMS, Xbus{BXL[stackP]} ← TOS LRot0, GOTO[WriteLM3],	c2;


{***************************************************************************
aReadL
****************************************************************************}
@ReadL:	{misc 110'b}
	FloatNop {Free BX in 2 BX cycles}, PC ← PC + 1,		c1, at[08, 10, Misc4n];
	Ybus ← TOS, AltUaddr, {FloatUMS,} 			c2;
	FloatULP, TOS ← FloatResult,				c3;
pcInDn:
	TOS ← FloatResult, GOTO[IBDispOnly],			c1;


{***************************************************************************
aReadM
****************************************************************************}
@ReadM:	{misc 111'b}
	FloatNop, PC ← PC + 1 {Free BX in 2 BX cycles},		c1, at[09, 10, Misc4n];
	Ybus ← TOS, AltUaddr,					c2;
	FloatUMP, TOS ← FloatResult, GOTO[pcInDn],		c3;


{**************************************************************************
aWriteMBus
**************************************************************************}
@WriteMBus: {misc 112'b}
	Bank ← MSBank0, L3 ← 0,					c1, at[0A, 10, Misc4n];
	Rx ← Rx + 0FF + 1 {trap table displacement},		c2;
MBusCommon:
	uNcTrapOffset ← Rx, pop, GOTOABS[B0MBus],		c3;


{**************************************************************************
aReadMBus
**************************************************************************}
@ReadMBus: {misc 113'b}
	Bank ← MSBank0, L3 ← 1,					c1, at[0B, 10, Misc4n];
	Rx ← Rx + 0FF + 1 {trap table displacement}, GOTO[MBusCommon],	c2;


{**************************************************************************
aWriteIBMBus
**************************************************************************}
@WriteIBMBus: {misc 114'b}
	Bank ← MSBank0, L3 ← 2,					c1, at[0C, 10, Misc4n];
	Rx ← Rx + 0FF + 1 {trap table displacement}, GOTO[MBusCommon],	c2;


{**************************************************************************
aReadIBMBus
**************************************************************************}
@ReadIBMBus: {misc 115'b}
	Bank ← MSBank0, L3 ← 3,					c1, at[0D, 10, Misc4n];
	Rx ← Rx + 0FF + 1 {trap table displacement}, GOTO[MBusCommon],	c2;



{Originally the opcodes here were in CedarB1.mc.

Fiala 30-Jul-85  9:08:55: Move ReadL and ReadM for Gasbarro to avoid conflict with LocalBlkZ.
Fiala 10-Apr-86 Replaced Rx by [] cosmetic edits and changed comments.
Fiala 20-May-86 17:17:23 Changed the Bank ← 0 to be Bank ← MSBank0 to allow
	for MS controls.
Fiala  9-Jul-86 11:00:45: Added WriteMBus and ReadMBus opcodes for Tim Diebert.
Fiala 29-Jul-86 12:54:12: Added WriteIBMBus and ReadIBMBus opcodes and
	revised WriteMBus and ReadMBus.
Fiala  8-Aug-86 16:45:30: Put in common entry sequence for Read/Write
	MBus/IBMBus opcodes saving 3 mi.
Fiala 11-Aug-86 11:04:10: Changed "WriteIBMBus" to "WritePCBus" and
	"ReadIBMBus" to "ReadPCBus" in opcode names.
Fiala 19-Nov-86 18:10:42 Split off the MBus opcodes into this separate file.
}