{File name: Bank1Misc.mc
Description: Miscellaneous Bank1 opcodes,
Author: JPM,
Created: July 16, 1986
Last Revised:
JPM, 17-Dec-86 15:52:30 In commented codes, renamed @ROTATEGRAY (obsolete) to @LINEBREAK
JPM, 16-Oct-86 17:00:55 Commented all image processing opcodes (phase 2)
JPM, 9-Oct-86 12:39:49 Added @a250 as unimplemented opcode (formerly @BLTLINE)
JPM, 29-Jul-86 14:25:06 Removed Reserve clause (now in Extensions.dfn)
JPM, 18-Jul-86 9:17:04 Added STK ← TOS in Bank1Fault code
JPM, 17-Jul-86 14:49:09 Reactivated image processing codes}
{ Copyright (C) 1986 by Xerox Corporation. All rights reserved.}
{Macros for dispatching on ESC codes or causing an ESC code trap}
MacroDef[ESCStd,(PC ← PC + 1, STK ← TOS, pop)];
MacroDef[ESCCancel,CANCELBR[Bank1EscOpcodeTrap,0F]];
MacroDef[Bank1ESCDisp,(ESCStd, DISP4[ESC#1n], c3, at[0#1,10,Bank1ESCHi])];
MacroDef[UnimplBank1ESCRange,(ESCStd, ESCCancel, c3, at[0#1,10,Bank1ESCHi])];
Bank1ESCx:
Xbus ← TT LRot0, XDisp, push, DISP4[Bank1ESCHi], c2, at[addrBank1ESCx];
{floating point}
IfEqual[ESC4nInBank1,1,Bank1ESCDisp[4]];
IfEqual[ESC5nInBank1,1,UnimplBank1ESCRange[5]];
IfEqual[ESCEnInBank1,1,Bank1ESCDisp[E]];
{Cedar}
IfEqual[ESC6nInBank1,1,UnimplBank1ESCRange[6]];
{image processing}
IfEqual[ESCAnInBank1,1,Bank1ESCDisp[A]];
{unassigned}
IfEqual[ESCBnInBank1,1,UnimplBank1ESCRange[B]];
IfEqual[ESCCnInBank1,1,UnimplBank1ESCRange[C]];
IfEqual[ESCDnInBank1,1,UnimplBank1ESCRange[D]];
IfEqual[ESCFnInBank1,1,UnimplBank1ESCRange[F]];
Bank1EscOpcodeTrap:
PC ← PC - 1, Bank ← r0100, {= bank0 in low 4 bits} c1;
Bank1ESCb:
T ← 0FF + TT + 1, GOTOBANK0[ESCc], c2;
{-- Floating Point (40H - 5FH are reserved) }
{@FADD: in VFpt c1, at[ 0,10,ESC4n];}
{@FSUB: in VFpt c1, at[ 1,10,ESC4n];}
{@FMUL: in VFpt c1, at[ 2,10,ESC4n];}
{@FDIV: in VFpt c1, at[ 3,10,ESC4n];}
{@FCOMP: in VFpt c1, at[ 4,10,ESC4n];}
{@FIX: in VFpt c1, at[ 5,10,ESC4n];}
{@FLOAT: in VFpt c1, at[ 6,10,ESC4n];}
{@FIXI: in VFpt c1, at[ 7,10,ESC4n];}
{@FIXC: in VFpt c1, at[ 8,10,ESC4n];}
{@FSTICKY: in VFpt c1, at[ 9,10,ESC4n];}
{@FREM: in VFpt c1, at[0A,10,ESC4n];}
{@ROUND: in VFpt c1, at[0B,10,ESC4n];}
{@ROUNDI: in VFpt c1, at[0C,10,ESC4n];}
{@ROUNDC: in VFpt c1, at[0D,10,ESC4n];}
{@FSQRT: in VFpt c1, at[0E,10,ESC4n];}
{@FSC: in VFpt c1, at[0F,10,ESC4n];}
{-- Cedar collector and allocator (60H - 6FH are reserved) }
{@RECLAIMREF: written by Mesa c1, at[ 0,10,ESC6n];}
{@ALTERCOUNT: written by Mesa c1, at[ 1,10,ESC6n];}
{@RESETSTKBITS: written by Mesa c1, at[ 2,10,ESC6n];}
{@GCSETUP: written by Mesa c1, at[ 3,10,ESC6n];}
{@a144: written by Mesa c1, at[ 4,10,ESC6n];}
{@ENUMERATERECLAIMABLE: written by Mesa c1, at[ 5,10,ESC6n];}
{@a146: written by Mesa c1, at[ 6,10,ESC6n];}
{@CREATEREF: written by Mesa c1, at[ 7,10,ESC6n];}
{@a150: written by Mesa c1, at[ 8,10,ESC6n];}
{@REFTYPE: written by Mesa c1, at[ 9,10,ESC6n];}
{@CANONICALREFTYPE: written by Mesa c1, at[0A,10,ESC6n];}
{@ALLOCQUANTIZED: written by Mesa c1, at[0B,10,ESC6n];}
{@ALLOCHEAP: written by Mesa c1, at[0C,10,ESC6n];}
{@FREEOBJECT: written by Mesa c1, at[0D,10,ESC6n];}
{@FREEQUANTIZED: written by Mesa c1, at[0E,10,ESC6n];}
{aFREEPREFIXED: written by Mesa c1, at[0F,10,ESC6n];}
{-- Image Processing Instructions (A0H - AFH are reserved) }
{@FLOYD: in Floyd c1, at[ 0,10,ESCAn];}
{@GRAYBLT: in GrayBLTCtrl c1, at[ 1,10,ESCAn];}
{@GRAYSUM: in GrayBLTCtrl c1, at[ 2,10,ESCAn];}
{@GRAYTHRSHLD: in GrayBLTCtrl c1, at[ 3,10,ESCAn];}
{@TRAPZBLT: in TrapzInit c1, at[ 4,10,ESCAn];}
{@COUNTBITSON: in CountBits c1, at[ 5,10,ESCAn];}
{@COUNTBITSOFF: in CountBits c1, at[ 6,10,ESCAn];}
{@BLTLINEGRAY: in BLTLineGray c1, at[ 7,10,ESCAn];}
{@HALFTONE: in Halftone c1, at[ 8,10,ESCAn];}
{@CHAINBLT: in ChainBLT c1, at[ 9,10,ESCAn];}
{@BUMPBITADDRESS: in BumpBitAddress c1, at[0A,10,ESCAn];}
{@FLIPXBITS: in FlipX c1, at[0B,10,ESCAn];}
{@FLIPXGRAY: in FlipX c1, at[0C,10,ESCAn];}
{@ROTATEBITS: in Rotate c1, at[0D,10,ESCAn];}
{@LINEBREAK: in LineBreak c1, at[0E,10,ESCAn];}
{@SCALEBITSTOGRAY: in ScaleBits c1, at[0F,10,ESCAn];}
{-- Floating Point additional}
@a340: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 0,10,ESCEn];
{@Unpack1Op: in VFpt c1, at[ 1,10,ESCEn];}
{@DeNorm: in VFpt c1, at[ 2,10,ESCEn];}
{@UsualPack: in VFpt c1, at[ 3,10,ESCEn];}
@a344: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 4,10,ESCEn];
@a345: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 5,10,ESCEn];
@a346: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 6,10,ESCEn];
@a347: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 7,10,ESCEn];
@a350: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 8,10,ESCEn];
@a351: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[ 9,10,ESCEn];
@a352: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0A,10,ESCEn];
@a353: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0B,10,ESCEn];
@a354: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0C,10,ESCEn];
@a355: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0D,10,ESCEn];
@a356: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0E,10,ESCEn];
@a357: PC ← PC - 1, Bank ← r0100, GOTO[Bank1ESCb], {Unimplemented} c1, at[0F,10,ESCEn];
{paths back to bank 0}
{Bank1Fault: go to fault handler}
{Parameters:
T contains fault type (qPageFault or qWriteProtect)
faulted address already stored in [uFaultParm1, uFaultParm0]}
Bank1Fault:
PC ← PC - 1, Bank ← r0100 {= bank0 in low 4 bits}, push, c3;
Rx ← pFault, STK ← TOS, pop, GOTOBANK0[SaveRegs], c1;
{Bank1Interrupt: go to interrupt handler}
Bank1Interrupt:
Bank ← bank0, c1;
Bank1Intc2:
PC ← PC - 1, GOTOBANK0[RefillInt], c2;
{Bank1NxtInstc1: dispatch on next opcode}
Bank1NxtInstc1:
Bank ← bank0, c1;
IBDisp, GOTOBANK0[DISPNIonly], c2;