;File=DCP05.sil Rev=I Date=6/20/83 Page=05  -MARKED BUILT- 
#u88:  S257 (74S257/16/N) ;a
#u47:  S244 (74S244/20/N) ;l
#u86:  S240 (74S240/20/N) ;l
#u96:  S244 (74S244/20/N) ;m
#u76:  25S10 (AMD25S10/16/N) ;a
#u77:  25S10 (AMD25S10/16/N) ;a
#u89:  25S10 (AMD25S10/16/N) ;a
#u90:  25S10 (AMD25S10/16/N) ;a
@
X.0: #u76.15o
X.4: #u76.14o
X.8: #u76.12o
X.12: #u76.11o
X.1: #u77.15o
X.5: #u77.14o
X.9: #u77.12o
X.13: #u77.11o
X.2: #u89.15o
X.6: #u89.14o
X.10: #u89.12o
X.14: #u89.11o
X.3: #u90.15o
X.7: #u90.14o
X.11: #u90.12o
X.15: #u90.11o
Y.2: #u89.4i
Y.3: #u90.4i
Y.0: #u76.4i
Y.1: #u77.4i
Y.7: #u90.1i
Y.11: #u90.2i
Y.15: #u90.3i
Y.15: #u90.7i
Y.11: #u90.6i
Y.7: #u90.5i
Y.6: #u89.1i
Y.10: #u89.2i
Y.14: #u89.3i
Y.14: #u89.7i
Y.10: #u89.6i
Y.6: #u89.5i
Y.5: #u77.1i
Y.9: #u77.2i
Y.13: #u77.3i
Y.13: #u77.7i
Y.9: #u77.6i
Y.5: #u77.5i
Y.4: #u76.1i
Y.8: #u76.2i
Y.12: #u76.3i
Y.12: #u76.7i
Y.8: #u76.6i
Y.4: #u76.5i
fZ.2: #u89.9i, #u77.9i, #u76.9i, #u90.9i
fZ.3: #u89.10i, #u77.10i, #u76.10i, #u90.10i
fZ.0: #u47.2i
fZ.1: #u47.4i
fZ.2: #u47.6i
fZ.3: #u47.8i
X.12: #u47.18o
X.13: #u47.16o
X.14: #u47.14o
X.15: #u47.12o
X.0: #u86.18o
X.1: #u86.16o
X.2: #u86.14o
X.3: #u86.12o
X.4: #u96.9o
X.5: #u96.7o
X.6: #u96.5o
X.7: #u96.3o
X.8: #u88.4o
X.9: #u88.7o
X.10: #u88.9o
X.11: #u88.12o
fY.0: #u88.2i
fY.1: #u88.5i
fY.2: #u88.11i
fY.3: #u88.14i
XBus←Rot': #u89.13i, #u77.13i, #u76.13i, #u90.13i
XHigh←0': #u86.1i, #u96.19i
XLow←Const': #u88.15i, #u47.1i
XLow←Byte': #u88.1i
PU: #u86.4i, #u86.6i, #u86.8i, #u86.2i
GND: #u88.13i, #u88.10i, #u88.6i, #u88.3i
GND: #u96.17i, #u96.15i, #u96.13i, #u96.11i