;File=DT1-05.sil Rev=A Date=8/05/84 Page=05  MARKED BUILT 
#U501:  LS151 (74LS151/16/N) ;a
#U403:  S257 (74S257/16/N) ;a
#U301:  S374 (74S374/20/N) ;x
#U405:  S00 (74S00/14/N) ;c
#U101:  no type specified  ;
#U401:  no type specified  ;
#U402:  25S09 (AMD25S09/16/N) ;a
@
C.Y0: #U101.4i
C.Y2: #U101.2i
C.Y3: #U101.1i
C.Y4: #U101.13i
C.Y5: #U101.14i
C.Y6: #U101.15i
C.Y7: #U101.5i
C.Y8: #U101.10i
C.Y9: #U101.11i
C.Y10: #U101.12i
C.Y1: #U101.3i
C.Zero: #U501.3i
C.Zero': #U501.2i
C.CY8: #U501.1i
C.Neg: #U501.15i
C.Neg': #U501.14i
C.Eq': #U101.9o, #U501.13i
C.Next4': #U405.10i
C.Branch': #U402.1i, #U501.5o, #U405.9i
C.Br4: #U405.8o
Init': #U301.17i
P.WriteReq': #U301.13i
T.AbortReq': #U301.8i
R.EndReq': #U301.4i
R.ReadyReq': #U301.3i
C170.85-0: #U301.11i
C.A0: #U403.3i
C.A1: #U403.6i
C.A2: #U403.10i
C.A3: #U403.13i
C.Req0: #U401.9o, #U403.2i
C.Req1: #U401.7o, #U403.5i
C.Req2: #U401.6o, #U403.11i
C.Bro: #U403.4o, #U402.3i
C.Br1: #U403.7o, #U402.6i
C.Br2: #U403.9o, #U402.11i
C.Br3: #U403.12o, #U402.14i
C.Next0: #U402.4i
C.Next1: #U402.5i
C.Next2: #U402.12i
C170.85-0: #U402.9i
C.Inst1: #U402.7o
C.Inst2: #U402.10o
C.Inst3: #U402.15o
C.CC2: #U501.9i
C.CC1: #U501.10i
C.CC0: #U501.11i
C.Resume: #U403.1i
C.PU: #U403.14i
C.PU: #U501.4i
C.PU: #U101.6i
C.PU: #U101.7i
C.Inst0: #U402.2o
GND: #U301.18i
GND: #U501.12i
C.Next3: #U402.13i
P.ReadReq': #U301.14i
Tx.Ready: #U301.7i
GND: #U501.7i
GND: #U401.5i
GND: #U301.1i
GND: #U403.15i
DT1-05.sil+1: #U301.19o, #U401.10i
DT1-05.sil+2: #U301.16o, #U401.11i
DT1-05.sil+3: #U301.15o, #U401.12i
DT1-05.sil+4: #U301.12o, #U401.13i
DT1-05.sil+5: #U301.9o, #U401.1i
DT1-05.sil+6: #U301.6o, #U401.2i
DT1-05.sil+7: #U301.5o, #U401.3i
DT1-05.sil+8: #U301.2o, #U401.4i