// Copyright (C) 1984  by Xerox Corporation. All rights reserved. 
// SDLC.doc, HGM,  5-Nov-84 23:00:12

CSB must be page aligned.

IOCBs can't cross pages.

Highest priority line is #0.  That's Chan A of the first SCC chip.
  Beware, the address for Chan A is higher than the address for Chan B.


The first chip needs an interrupt vector of 0.  The second chip needs 10H....