{DataTest.mc, HGM, 14-Feb-85  1:50:31}

	Reserve[0F5F, 0FFF]; {section used by the CP Kernel }
	SetTask[0]; StartAddress[Go];

RegDef[address, R, 1];
  RegDef[rhAddr, RH, 1];
RegDef[expected, R, 3];
RegDef[found, R, 4];
RegDef[maskIn, R, 5];
RegDef[maskOut, R, 6];

RegDef[echoPlug, R, 09];
RegDef[address10, R, 0A];
RegDef[address20, R, 0B];
RegDef[temp, R, 0D];
RegDef[passCount, R, 0E]; {number of good passes}


Trap:	temp ← RRot1 ErrnIBnStkp, ClrIntErr, CANCELBR[$, 0F],	c1, at[0];
	Xbus ← temp LRot0, XwdDisp,				c2;
	DISP2[TrapType],					c3;
	
Parity:	GOTO[GoToGo],						c1, at[0,4,TrapType];
Init:	GOTO[GoToGo],						c1, at[1,4,TrapType];
Stack:	GOTO[GoToGo],						c1, at[2,4,TrapType];
IB:	GOTO[GoToGo],						c1, at[3,4,TrapType];

GoToGo:
	Noop,							c2;
	Noop, GOTO[Go],						c3;

Go: 	passCount ← 0, ClrIntErr,				c1;
	ExtCtrl ← 5, {Init Incr, Zero, UnBlank}			c2;
	expected ← 0,						c3;

MainLoop:
	Noop,							c1;
	Noop,							c2;
	Noop,							c3;

{------------------------------------------------------------------------------------}

ResetEverybody:
	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 4, {Misc: 49000}				c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 001, {Krock to avoid getting Booted}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 5, {EProm: 59000}				c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 2, {Modem: 21000}				c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 4, {Dialer0: 41000}				c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 5, {Dialer1: 51000}				c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 6, {Dialer2: 61000}				c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 1, {Reset}					c2;
	Noop,							c3;

FirstLoop:
	Noop,							c1;
	Noop,							c2;
	Noop,							c3;

Misc:
	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 4, {Misc: 49000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestMiscA:
	maskOut ← 0FF, {All 8 bits}				c1;
	maskIn ← 0FF, {All 8 bits},				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortAInternalDataFailed],			c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortAFloatDataFailed],			c2;
	Noop,							c3;

TestMiscB:
	maskOut ← 01F, {Low 5 bits}				c1;
	maskIn ← 010, {Pullups on mEn work too well}		c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 080, {Port B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortBInternalDataFailed],			c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortBFloatDataFailed],			c2;
	Noop,							c3;

TestMiscC:
	maskOut ← 00E, {Only 4 bits, low bit is Boot'}		c1;
	maskIn ← 002, {Pullups on IntChan}			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortCInternalDataFailed],			c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, MiscPortCFloatDataFailed],			c2;
	Noop,							c3;

EProm:
	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 5, {EProm: 59000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestEPromA:
	maskOut ← 0FF, {All 8 bits}				c1;
	maskIn ← 03F, {Pullups on 2 high bits},			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortAInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortAFloatDataFailed],			c2;
	Noop,							c3;

TestEPromB:
	maskOut ← 0FF, {All 8 bits}				c1;
	maskIn ← 0FF,						c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 080, {Port B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortBInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortBFloatDataFailed],			c2;
	Noop,							c3;

TestEPromC:
	maskOut ← 00F, {Only 4 bits}				c1;
	maskIn ← 007, {Pullup on PromOE'}			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortCInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, EPromPortCFloatDataFailed],			c2;
	Noop,							c3;

Modem:
	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 2, {Modem: 21000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestModemA:
	maskOut ← 000, {DSR*'}					c1;
	maskIn ← 000, {All are Input},				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortAInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortAFloatDataFailed],			c2;
	Noop,							c3;

TestModemB:
	maskOut ← 000, {RI*'}					c1;
	maskIn ← 000, {All are Input},				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 080, {Port B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortBInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortBFloatDataFailed],			c2;
	Noop,							c3;

TestModemC:
	maskOut ← 00F, {Only 4 bits}				c1;
	maskIn ← 00E, {Inputs to chips is too much load}	c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortCInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, ModemPortCFloatDataFailed],			c2;
	Noop,							c3;

Dialer0:
	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 4, {Dialer0: 41000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestDialer0A:
	maskOut ← 0FF, {All are outputs}			c1;
	maskIn ← 000, {Chips pull up}				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortAInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortAFloatDataFailed],			c2;
	Noop,							c3;

{Keep driving the data wanted below.}
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

TestDialer0B:
	maskOut ← 000, {DI0*'}					c1;
	maskIn ← echoPlug, {Input from PortA},			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 084, {Port A+B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortBInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

{This checking data that has gone all the way out through the echo plug.}
	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortBEchoDataFailed],			c2;
	Noop,							c3;

TestDialer0C:
	maskOut ← 00F, {Only 4 bits}				c1;
	maskIn ← 00E, {Inputs to chips is too much load}	c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortCInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer0PortCFloatDataFailed],			c2;
	Noop,							c3;

Dialer1:
	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 5, {Dialer1: 51000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestDialer1A:
	maskOut ← 0FF, {All are outputs}			c1;
	maskIn ← 000, {Chips pull up}				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortAInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortAFloatDataFailed],			c2;
	Noop,							c3;

{Keep driving the data wanted below.}
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

TestDialer1B:
	maskOut ← 000, {DI0*'}					c1;
	maskIn ← echoPlug, {Input from PortA},			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 084, {Port A+B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortBInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

{This checking data that has gone all the way out through the echo plug.}
	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortBEchoDataFailed],			c2;
	Noop,							c3;

TestDialer1C:
	maskOut ← 00F, {Only 4 bits}				c1;
	maskIn ← 00E, {Inputs to chips is too much load}	c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortCInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer1PortCFloatDataFailed],			c2;
	Noop,							c3;

Dialer2:
	address ← 10,						c1;
	address ← address LRot8, {1000}				c2;
	rhAddr ← 6, {Dialer2: 61000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0], {Master Interrupt Control}	c1;
	MDR ← 0, {~Reset}					c2;
	Noop,							c3;

TestDialer2A:
	maskOut ← 0FF, {All are outputs}			c1;
	maskIn ← 000, {Chips pull up}				c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 004, {Port A Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortAInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortAFloatDataFailed],			c2;
	Noop,							c3;

{Keep driving the data wanted below.}
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

TestDialer2B:
	maskOut ← 000, {DI0*'}					c1;
	maskIn ← echoPlug, {Input from PortA},			c2;
	Noop,							c3;
	
	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 084, {Port A+B Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortBInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {Input}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

{This checking data that has gone all the way out through the echo plug.}
	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortBEchoDataFailed],			c2;
	Noop,							c3;

TestDialer2C:
	maskOut ← 00F, {Only 4 bits}				c1;
	maskIn ← 00E, {Inputs to chips is too much load}	c2;
	Noop,							c3;
	
	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← ~maskOut, {Output}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 010, {Port C Enable}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F and expected, {Write Enable mask}		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskOut and found,					c1;
	temp ← Q,						c2;
	Q ← maskOut and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortCInternalDataFailed],		c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Input (only 4 bits)}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	Q ← maskIn and found,					c1;
	temp ← Q,						c2;
	Q ← maskIn and expected,				c3;

	[] ← temp xor Q, NZeroBr,				c1;
	BRANCH[$, Dialer2PortCFloatDataFailed],			c2;
	Noop,							c3;

FirstLoopEnd:
	Noop,							c1;
	expected ← expected + 1, PgCarryBr,			c2;
	expected ← expected and 0FF, BRANCH[FirstLoop, $],	c3;

{------------------------------------------------------------------------------------}

{This isn't really what I want yet.
	Set mData, mEn and PromOE' HIGH.
	Maybe shorts to PromAd will show up. }

SecondSection:
	Noop,							c1;
	Noop,							c2;
	Noop,							c3;

SecondMisc:
	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 4, {Misc: 49000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← 0FF,						c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 000, {Output}					c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0E0, {Top 3 bits are input}			c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← 0FF, {mEn}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F, {Beware of Boot'}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Output}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 094, {Enable Ports A, B, and C}			c2;
	Noop,							c3;

SecondEprom:
	address ← 90,						c1;
	address ← address LRot8, {9000}				c2;
	rhAddr ← 5, {EProm: 59000}				c3;

	address10 ← address + 10,				c1;
	address20 ← address + 20,				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0F], {Port C Data}		c1;
	MDR ← 00F, {Beware of Boot'}				c2;
	Noop,							c3;

	IO ← [rhAddr, address + 06], {Port C Direction}		c1;
	MDR ← 0F, {Output}					c2;
	Noop,							c3;

	IO ← [rhAddr, address + 01], {Master Config/Control}	c1;
	MDR ← 094, {Enable Ports A, B, and C}			c2;
	Noop,							c3;

SecondLoop:
	Noop,							c1;
	Noop,							c2;
	Noop,							c3;

TestPromAddr:
	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 000, {All Output}					c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 000, {All Output}					c2;
	temp ← expected LRot8,					c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	MDR ← temp,						c2;
	Noop,							c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	MDR ← expected,						c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 03], {Port A Direction}	c1;
	MDR ← 03F, {2 high bits have pullups}			c2;
	Noop,							c3;

	IO ← [rhAddr, address20 + 0B], {Port B Direction}	c1;
	MDR ← 0FF, {All Input (float)}				c2;
	temp ← expected LRot8,					c3;

	IO ← [rhAddr, address + 0D], {Port A Data}		c1;
	Noop,							c2;
	found ← MD,						c3;

	IO ← [rhAddr, address + 0E], {Port B Data}		c1;
	found ← found LRot8,					c2;
	found ← found or MD,					c3;

	[] ← found xor expected, NZeroBr,			c1;
	BRANCH[$, PromAddrMashed],				c2;
	Noop,							c3;

SecondLoopEnd:
	Noop,							c1;
	expected ← expected + 1, CarryBr,			c2;
	expected ← expected, BRANCH[SecondLoop, $],		c3;

	ExtCtrl ← 3, {Gets Bumped on rising edge} 		c1;
	ExtCtrl ← 7,						c2;
	passCount ← passCount + 1, GOTO[MainLoop],		c3;
	

{------------------------------------------------------------------------------------}


	
MiscPortAInternalDataFailed:	GOTO[Restart],			c3;
MiscPortAFloatDataFailed:	GOTO[Restart],			c3;
MiscPortBInternalDataFailed:	GOTO[Restart],			c3;
MiscPortBFloatDataFailed:	GOTO[Restart],			c3;
MiscPortCInternalDataFailed:	GOTO[Restart],			c3;
MiscPortCFloatDataFailed:	GOTO[Restart],			c3;
	
EPromPortAInternalDataFailed:	GOTO[Restart],			c3;
EPromPortAFloatDataFailed:	GOTO[Restart],			c3;
EPromPortBInternalDataFailed:	GOTO[Restart],			c3;
EPromPortBFloatDataFailed:	GOTO[Restart],			c3;
EPromPortCInternalDataFailed:	GOTO[Restart],			c3;
EPromPortCFloatDataFailed:	GOTO[Restart],			c3;
	
ModemPortAInternalDataFailed:	GOTO[Restart],			c3;
ModemPortAFloatDataFailed:	GOTO[Restart],			c3;
ModemPortBInternalDataFailed:	GOTO[Restart],			c3;
ModemPortBFloatDataFailed:	GOTO[Restart],			c3;
ModemPortCInternalDataFailed:	GOTO[Restart],			c3;
ModemPortCFloatDataFailed:	GOTO[Restart],			c3;
	
Dialer0PortAInternalDataFailed:	GOTO[Restart],			c3;
Dialer0PortAFloatDataFailed:	GOTO[Restart],			c3;
Dialer0PortBInternalDataFailed:	GOTO[Restart],			c3;
Dialer0PortBEchoDataFailed:	GOTO[Restart],			c3;
Dialer0PortCInternalDataFailed:	GOTO[Restart],			c3;
Dialer0PortCFloatDataFailed:	GOTO[Restart],			c3;

Dialer1PortAInternalDataFailed:	GOTO[Restart],			c3;
Dialer1PortAFloatDataFailed:	GOTO[Restart],			c3;
Dialer1PortBInternalDataFailed:	GOTO[Restart],			c3;
Dialer1PortBEchoDataFailed:	GOTO[Restart],			c3;
Dialer1PortCInternalDataFailed:	GOTO[Restart],			c3;
Dialer1PortCFloatDataFailed:	GOTO[Restart],			c3;

Dialer2PortAInternalDataFailed:	GOTO[Restart],			c3;
Dialer2PortAFloatDataFailed:	GOTO[Restart],			c3;
Dialer2PortBInternalDataFailed:	GOTO[Restart],			c3;
Dialer2PortBEchoDataFailed:	GOTO[Restart],			c3;
Dialer2PortCInternalDataFailed:	GOTO[Restart],			c3;
Dialer2PortCFloatDataFailed:	GOTO[Restart],			c3;
	
PromAddrMashed:	GOTO[Restart],					c3;
	
Restart:
	Q ← 0FF,						c1;
	Noop,							c2;
RestartLoop:
	Noop,							c3;

	Q ← Q - 1, ZeroBr,					c1;
	BRANCH[RestartLoop, $],					c2;
	GOTO[Go],						c3;

{------------------------------------------------------------------------------------}