PageDateRevDesignerProjectFileSDDAXEROXDaisyReference41IBIPSim41.silyMemory AddressingBus Interface -The Daisy memory will be constructed using 256K DRAM chips.These will have a "nibble mode" feature that allows one toread four bits from a chip in quick succession. This mode willbe used by the display controller and by the processors whendoing double word fetches. Unfortunately, the method ofaddressing the nibbles is clumsy. Assume the address bits01234567891011121314151617181920212223The 256K memory chips take 18 bit addresses in two 9 bit groups,23222120191817161514131211109876543210The unfortunate part is that the four bits returned from each memory chip are addressed by ColAddr.8,,RowAddr.8. Thus, ifaddress 000000 were sent to a memory system addressed inthis manner, words 0, 512, 1, 513 would be returned onsuccessive nibble mode accesses. This is horribly confusing foreither BitBlt, the display controller or both. To fix this, the01234567131211109823141516171819202122Thus, it is only necessary to sent 15 bits in one step andThe A chip saves the extra bit sent in the first step andsends it as part of the column address.During a real memory reference, the most significant 8Arithmetic or logical operations are only allowed on theleast significant byte of real addresses. This in onlyreasonable since pages are 256 words long and consecutivevirtual pages are seldom assigned consecutive real pages.The AP interface pins are multiplexed among the first groupof address bits (called A1), the second group of addressbits (called A2) and the write or read data. The twoaddress groups are formed as follows:AP.00AP.01AP.02AP.03AP.04AP.05AP.06AP.07AP.08AP.09AP.10AP.11AP.12AP.13AP.14AP.15A1Mem. Addr.F.15RA.[0..8]CA.[0..8]CA.[0..8]RA.[0..8]The chips accept the CA.[0.8] bits some 50 nS later.0123456788765432100123456788765432107654321015141312111000010203040506070809012345543210RA.0RA.1RA.3RA.8RA.2RA.4RA.5RA.6RA.7CA.0A2Mem. Addr.F.7*F.8F.10F.9F.11F.12F.13F.14CA.1CA.2CA.3CA.4CA.5CA.6CA.7CA.8are held in an RH,,R,,FBus triplet, one byte in each.F.[08..15]always performs F_rB when MAR_ is specified.For obscure reasons, they are permuted when sentfrom the IBIP to the A chip (see below).09080605040302010010111213140123456715F07F.[07..14]address bits are permuted as follows:H.[0..7]H.[0..7]B.[00..05]B.[00..05]The RH bits appear on the H bus and the R bits on the B bus.B.00B.01B.02B.03B.04B.05B.06* F.7 = B.7 since the most significant byte of the ALUH.0H.1H.2H.3H.4H.5H.6H.7Bthen 9 bits in the second step. Because we wish to beable to support 64K chips if necessary, we send 16 bits, then 8.bits are read from an RH register (H.[0..7]), the nextmost significant bits from an R register (B.[00..07]) andthe least significant 8 bits from the F bus (F.[08..15])."Mem Addr" is the interpretation the A chip gives tothe address bits on the AP bus. The presence of the A1bits is signalled by Cp' going LO. A2 is signalled by Ca'dropping.Row address and Column address. The remaining bits are either unused,Assume addressing were done in the straightforward manner:AS.[0..2]unusedunusedAS.[0..2]BSused to select an A chip (AS.x), or used to select a memory bank(BS).BSunusedunusedAS.0AS.2AS.1BSThe A Chip, Bank Select and RA bits are needed first.Garner, Davies8/16/83оIжuпNроIXпХюGоAпХюGо>;пХюGо1sпХюGо&WпХюGоrпХюGо«пХюGопХюG№оMКпЋюGGопЋюMКGоAђпNро>ЙпNро2пNро9пNро&епNропЋюMКGо9про?Wpп]ропyроЗп]роЏuпNр оKpп]ро&еп]роп@роплро«tпgГр;о«пf§р:о«пeЉр?о«пdnр<о«пcQр8о«пb5р:оЗпYЯро пYЯро9пYЯроrпYЯро«пYЯродпYЯропYЯроVпYЯроЏпYЯроИпYЯроsпYЯро¬пYЯро!епYЯро$пYЯро&WпYЯро(ђпYЯро*ИпYЯро-пYЯро/:пYЯро1sпYЯро3¬пYЯро5епYЯро8пYЯро:WпYЯро«п[Cю5W$о«пY ю5W$о«пY.ю$9одпY.ю$9опY.ю$9о VпY.ю$9о:пY.ю$9опY.ю$9оИпY.ю$9оЏпY.ю$9оsпY.ю$9о¬пY.ю$9одпY.ю$9опY.ю$9о(пY.ю$9о%ИпY.ю$9о#ЏпY.ю$9о!VпY.ю$9о*:пY.ю$9о,sпY.ю$9о.¬пY.ю$9о0епY.ю$9о9ЙпY.ю$9о7ђпY.ю$9о5WпY.ю$9о3пY.ю$9о<пY.ю$9о«п[хю$«оsп[хю$«о<п[хю$«о«пUьр@о<пKШю$9о3пKШю$9о5WпKШю$9о7ђпKШю$9о9ЙпKШю$9о0епKШю$9о.¬пKШю$9о,sпKШю$9о*:пKШю$9о!VпKШю$9о#ЏпKШю$9о%ИпKШю$9о(пKШю$9опKШю$9одпKШю$9о¬пKШю$9оsпKШю$9оЏпKШю$9оИпKШю$9опKШю$9о:пKШю$9о VпKШю$9опKШю$9одпKШю$9о«пKШю$9о«пKґю5W$о«пMню5W$о:WпLЉро8пLЉро5епLЉро3¬пLЉро1sпLЉро/:пLЉро-пLЉро*ИпLЉро(ђпLЉро&WпLЉро$пLЉро!епLЉро¬пLЉроsпLЉроИпLЉроЏпLЉроVпLЉропLЉродпLЉро«пLЉроrпLЉро9пLЉро пLЉроЗпLЉро«пNџю$«о<пNџю$«опNџю$«о(пNџю$«о«пH¦р>о«пG‰р<о«пFmр8о«пEPр6о«пD4р@о«пCр@о«п?{ю5W$о«п=Bю5W$о«п=fю$9одп=fю$9оп=fю$9о Vп=fю$9о:п=fю$9оп=fю$9оИп=fю$9оЏп=fю$9оsп=fю$9о¬п=fю$9одп=fю$9оп=fю$9о(п=fю$9о%Ип=fю$9о#Џп=fю$9о!Vп=fю$9о*:п=fю$9о,sп=fю$9о.¬п=fю$9о0еп=fю$9о9Йп=fю$9о7ђп=fю$9о5Wп=fю$9о3п=fю$9о<п=fю$9оЗп>ро п>ро9п>роrп>ро«п>родп>роп>роVп>ро$п>ро!еп>ро¬п>роsп>роИп>роЏп>ро&Wп>ро(ђп>ро*Ип>ро-п>ро/:п>ро1sп>ро3¬п>ро5еп>ро8п>ро:Wп>ро«п/р:о«п+Бр9о«п*Ґр'о«п(lр6о«п#ър8о«п"Юр7о«п!Бр9о«п Ґр9о«пlр;о«пOр8о«п3р5о«пр%о9пOро«пOропOроЏпOропOроsпOро!епOро&WпOро*ИпOро/:пOро3¬пOро8пOро<ђпOроAпOроEtпOроIжпOро«п№ю$оп№ю$оЏп№ю$оп№ю$о%Ип№ю$о!Vп№ю$одп№ю$оsп№ю$о*:п№ю$о.¬п№ю$о3п№ю$о7ђп№ю$оIXп№ю$оDжп№ю$о@tп№ю$о<п№ю$о9п€ропЭр оJtп€ро:пPmр о/ЙпPmр о/Йп6Юр о:п6Юр о«п03р4опNГроVпNГроЏпNГроИпNГропNГро :пNГро"sпNГро$¬пNГро&епNГро:епNГро8¬пNГро6tпNГро4;пNГро2пNГро/ЙпNГро-ђпNГро+WпNГро)пNГро)п8‰ро+Wп8‰ро-ђп8‰ро/Йп8‰ро2п8‰ро4;п8‰ро6tп8‰ро8¬п8‰ро:еп8‰ро&еп8‰ро$¬п8‰ро"sп8‰ро :п8‰роп8‰роИп8‰роЏп8‰роVп8‰роп8‰роVп\роп\родп\ро«п\роrп\ро9п\ро п\роЗп\ро:Wп\ро8п\ро5еп\ро3¬п\ро1sп\ро/:п\роп\ро:п\роsп\ро¬п\ро!еп\ро$п\ро&Wп\ро(ђп\ро*Ип\ро-п\роЗпNГро пNГро9пNГроrпNГро«пNГродпNГродп8‰ро«п8‰роrп8‰ро9п8‰ро п8‰роЗп8‰роBпЭроFђпЭро9пЭроJtпЭроЗпЭро«пЭропЭроЏпЭропЭро"sпЭро9пропkр о'sпро+епро4Йпро0Wпро9;про=проAђпроFпро&епkро+епkро/Йпkро4;пkро8¬пkро=пkроAђпkроFпkро«пaр5о*:п[хю$«о0Wп]Гр о«п‡р,о«п2lр0о«п1Pр(о/:п;Юро-п;Юро(ђп;Юро$п;Юро!еп;Юро¬п;Юроsп;Юро:п;Юроп;Юро1sп;Юро3¬п;Юро5еп;Юро8п;Юро:Wп;ЮроЗп;Юро п;Юро9п;Юроrп;Юро«п;Юродп;Юроп;ЮроVп;Юро&Wп;Юро&еп:4ро*Ип;Юро/:п:4р о*:п:ю$Зо%Ип:ю$Зоsп:ю$Зо«п6»ю$оп6»ю$Uо(п6»ю$о<п6»ю$о«пAыр%оMКп№ю$о«піюG$о«пzюG$о«п–юG$опюMК$о«п9ню5W$о дп]Гроп:4роsп:4р оsп]Гр о«п_ьр<оЗп€ро9п€ро«п€роп€роЏп€роп€ро"sп€роЋп¤р6о'sп€ро+еп€ро0Wп€ро4Йп€ро9;п€ро=п€роBп€роFђп€ро)п:4ро«п-ър6о«п,Юр@о«п'Oр6о«п&3р9о«п%р9о«п Эр4о«пАр7о«п¤р:о«п‡р о«пTЯрFо«пR¦р:оИпNџю$«опNџю$«о9пPmр о9пPmро9п6Юро9п6Юр оVп6Юро«пSГрEоVпPmроИп6»ю$Uоп6»ю$Uо&WпЭро*ИпЭро/ЙпЭро8¬пЭро4;пЭро=пЭро«п3‰р5о2ђpп]роBп]ряЮдЋNh.ЯunusedunusedAS.0AS.2AS.1BSPageDateRevDesignerProjectFileSDDAXEROXDaisyReferenceMemory AddressingBus Interface -IBIPSim42.sily42AP.00AP.01AP.02AP.03AP.04AP.05AP.06AP.07AP.08AP.09AP.10AP.11AP.12AP.13AP.14AP.15A1RA.0RA.1RA.3RA.8RA.2RA.4RA.5RA.6RA.7CA.0A2CA.1CA.2CA.3CA.4CA.5CA.6CA.7CA.8Continued from IBIPSim41.silyis the Instruction Buffer. Its addresses aregenerated by the concatenation of thefetch Program Counter's page number (fPCp)and its page displacement (fPCd). These bitsare sent as follows:Mem.Mem.fPCp.0fPCp.1fPCp.2fPCp.3fPCp.4fPCp.5fPCp.6fPCp.8fPCp.7fPCd.0fPCd.1fPCd.2fPCd.3fPCd.4fPCd.5fPCd.6Note that since all Instruction Buffer fetchesreference double words, fPCd.7 is always sentas 0 or GND.Map _The Mesa Virtual Memory map is held inmain memory starting at location 1000'X.The A chip has no special circuitry foraddressing the map, virtual addresses areconverted into map indexes in the P chip.The 80186 must do a similar transformation.The entries for consecutive virtual pagesdo not lie in consecutive map locations.This again result from the permutation ofaddress bits done to make nibble modeaccesses return consecutive addresses.The trick here was to send the least significant bit of address in the first groupof addresses (A1). The least significantbit of a map index would normally be F.7since this is the least significant bit of acomputed page number. Unlike F.15 however,F.7 will not be ready into well into PhaseB. This is too late for it to be sent inA1. The only bits that will be ready in PhaseA are the RH.[0..7] bits. Conceptually, anyof them could be chosen to be the leastsignificant map index bit. To make thingseasy for the 80186, we should chooseeither RH.0 or RH.7. To convert a virtualpage number into a map index, the 80186will move the bit chosen (RH.0 or RH.7) tothe least significant bit and shift the lowerorder bits up to fill the hole. One wouldlike to choose RH.0 since this becomes asimple 16 bit left rotate. However, if a22 or 23 bit virtual address space is used,only even locations in the map will be used,wasting 16K or 32K words respectively.Hence, we choose RH.7. The 80186 can formthe map index by doing a right rotate of theupper byte, putting the bit to be movedinto the Carry flag followed by a 16 bitleft rotate, putting the Carry flag intothe LSB.Mem.Mem.CA.8CA.7CA.6CA.5CA.4CA.3CA.2CA.1A2CA.0RA.7RA.6RA.5RA.4RA.2RA.8RA.3RA.1RA.0A1AP.15AP.14AP.13AP.12AP.11AP.10AP.09AP.08AP.07AP.06AP.05AP.04AP.03AP.02AP.01AP.00F.0F.1F.2F.3F.4F.5F.6F.7fPCp.9fPCp.10fPCp.11fPCp.12fPCp.13fPCp.14fPCp.15000000010The other source of addresses for the AP busBSAS.1AS.2AS.0unusedunusedthe address bits on the AP bus. The presence of the A1bits is signalled by Cp' going LO. A2 is signalled by Ca'dropping."Mem" is the interpretation the A chip gives toH.0H.1H.2H.3H.4H.5H.6Garner, Davies8/14/83H.7о#tпLЉро'sпLЉро-пLЉро7пLЉро2пLЉро<ђпLЉроIжuпNроIXпХюGоAпХюGо>;пХюGо1sпХюGо&WпХюGоrпХюGо«пХюGопХюG№оMКпЋюGGопЋюMКGоAђпNро>ЙпNро2пNро9пNро&епNропЋюMКGо9про?Wpп]ропyроЗп]роЏuпNр оpп@роплро&еп]роKп]родtпPыроVпPыроИпPыро9пPыро«пPыропPыроЏпPыро#пPыро'sпPыро,sпPыро1sпPыро6tпPыро;tпPыро@tпPыроEtпPыроJtпPыроUпGfю$оUпR_юK‘$оUпGBюKґ$оЗпGfю$о9пGfю$о«пGfю$о"sпGfю$опGfю$оЏпGfю$опGfю$о&епGfю$о+епGfю$о0епGfю$о5епGfю$оIжпGfю$оDжпGfю$о?жпGfю$о:епGfю$опNГроAпLЉроFпLЉродпLЉроNжпGfю$оKпLЉроrпLЉро VпLЉроИпLЉро:пLЉро¬пLЉропLЉропJQро#ЏпHро(пHро-ђпHро2пHро7пHро<пHроAпHроFпHропKґюNж$о«pп]|роrtпYQр-оrпX5р%оrпWр*оrпUьр-оrпTЯропHропLЉродпNГроVпNГроИпNГро9пNГро«пNГропNГроЏпNГро#пNГро#пJQро'sпJQро,sпJQро1sпJQро6tпJQро;tпJQро@tпJQроEtпJQроrпEPр.оrпD4р-оrпCроп@PюPkо«pп=Bроrtп;Pр&оrп:4р(оrп9р'оrп7ыр)оrп6Юр)оrп5Вр+оUпP&юKґ$оrп4Ґр)оrп3‰р(оrп2lр)оrп1Pр%оrп03р&оrп/р%оrп-ър-оrп,Юр)оrп+Бр(оrп*Ґр,оrп)€р+оrп(lр*оrп'Oр)оrп&3р.оrп%р,о#Џп;Pр'о#Џп:4р*о#Џп9р$о#Џп7ыр*о#Џп6Юр'о#Џп5Вр*о#Џп4Ґр-о#Џп3‰р*о#Џп2lр(о#Џп1Pр)о#Џп03р+о#Џп/р,о#Џп-ър&о#Џп,Юр*о#Џп+Бр,о#Џп*Ґр'о#Џп)€р(о#Џп(lр(о#Џп'OроUпюKґ$опkропъроп–юNж$оFпъроAпъро<пъро7пъро2пъро-пъро(пъро#Џпъроп3ропkро¬пkро:пkроИпkро VпkроrпkроKпkроNжпHю$одпkроFпkроAпkроп¤ро:епHю$о?жпHю$оDжпHю$оIжпHю$о5епHю$о0епHю$о+епHю$о&епHю$опHю$оЏпHю$опHю$о"sпHю$о«пHю$о9пHю$оЗпHю$оUп$юKґ$оUпAюK‘$оUпHю$оJtпЭроEtпЭро@tпЭро;tпЭро6tпЭро1sпЭро,sпЭро'sпЭро#пЭроЏпЭропЭро«пЭро9пЭроИпЭроVпЭродпЭро#Џп3ро(п3ро-ђп3ро2ђп3ро7ђп3ро<ђп3роAђп3роFђп3ро'sпNГро,sпNГро1sпNГро6tпNГро;tпNГро@tпNГроEtпNГро$п¤ро(ђп¤ро.п¤ро2ђп¤ро7ђп¤ро<ђп¤роAђп¤роFђп¤роK‘пNГроrпZnр,о<ђпkро2пkро7пkро-пkро'sпkро#пkроrп¤р7оrп‡р:оrп kр оrп Ар/оп¤ро rп¤ро дп¤роVп¤роИп¤ро:п¤ро¬п¤ро2ђpп]роBп]роK‘tп¤р"дЋP^.{ Helvetica Helvetica Helvetica±уj/яя›m™nяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяяIBIPSim41.sily etc. Hel DDavies.PAF19-Aug-83 20:33:02