[Indigo]<Chipndale>documentation>ChipndaleTools19.tioga!10

ChipndaleTools19.tioga

last edited by: Christian Jacobi March 4, 1985 1:38:07 pm PST

CHIPNDALETOOLS 0.19

CHIPNDALETOOLS 0.19 — FOR INTERNAL XEROX USE ONLY

Chipndale

An interactive editor for VLSI designs

Some additional tools

Release 0.19

Ch. Jacobi, Kim Rachmeler et all (April 25, 1985)

A relatively incomplete documentation.

Filed on: [Indigo]<Chipndale>Documentation>ChipndaleTools19.tioga

Abstract: Chipndale, is an interactive graphic layout tool made to run in Cedar. Chipndale makes use of multiple windows, extensive parallel processing, vast amounts of memory, pop-up menus, and other assorted goodies. When complete, Chipndale will have a DRC and circuit extractor, a fast set of IO and checkplot routines, and modular device extensibility. What's more, everything in Chipndale will be completely technology independent, that is, all the features will be equally at home dealing with PC boards or CMOS chips.

This document document tells the designer about additional tools, like generating checkplots, masks, CIF output

XEROX Xerox Corporation
Palo Alto Research Center
3333 Coyote Hill Road
Palo Alto, California 94304

For Internal Xerox Use Only

0. General programs to run in Chipndale

Abort the program: <ESC><DEL> aborts most programs; all which do query for abort as they should.

The program menu: <SPACE>-<P> shows a menu of programs to run.

The rect program menu: <SHIFT>-<P>-middle shows also a menu of programs to run. The command allows you first to drag a rectangular area; This area is provided the program as a parameter.

Usually programs must be started first, only thereafter they register their commands. However some very important programs may have tiptable entries of their own.

1. Design rule checking

DF File: /Indigo/ChipNDale/5.2/top/Spinifex19

Start program: nmosSpinifex

or cmosSpinifex

DRC/Extraction

(contributed by Mark Shand)

Spinifex - the ChipNDale DRC/Extraction Package

August 9, 1984

DF file: /Indigo/ChipNDale/5.2/top/Spinifex17.df

Documentation: SpinifexDoc.tioga (in DF file)

Maintainer: Shand

The Spinifex DRC/Extraction Package is ready for use by ChipNDale designs. What follows is a list of problem areas a new user may encounter, for more details see the documentation.

1) The design rules are not 100% complete, this is particularly true of rules with regard to well contacts (though Spinifex does insist that wells are connected to by one and only one node).

2) There is no support for `wspec' files as yet (this is coming soon).

3) The .thy files produced require some hand editing, I hope to reduce or eliminate this.

4) Aliases for signal names are not handled fully, currently one name is chosen and a comment is insert in the .thy file indicating the choices which were available to Spinifex.

5) Strays are fairly accurate but there could be bugs in this computation (if there are it is only a few percent error).

6) Spinifex could be both faster and less greedy for VM.

Spinifex/HighlightNode - highlighting electrically connected regions.

August 9, 1984

Spinifex has the ability to interactively highlight electrical nodes the command is invoked by MiddleDown WHILE Slash. If material on the current layer is found at the point indicated and it is part of a cell which has been previously extracted then all regions electrically connected to that region have boxes on the ChipNDale highlightShade level laid over them. Be warned that shading does not extend to material in cells which have not been analyzed or above the current pushed in level.

ShowErrors

July 26, 1984

DF file: /Indigo/ChipNDale/5.2/top/ShowErrors.df

Documentation: ShowErrorsDoc.tioga (in DF file)

Maintainer: Shand

ShowErrors implements a simple command to zoom a ChipNDale viewer to a rectangle on the highLightError layer. (How these rectangles get on the highLightError layer is another matter altogether, Spinifex—my layout analysis package and PTiler—Bob Mayo's module generating system are two ChipNDale clients that display errors as rectangles on the highLightError layer.)

ShowErrors is invoked by the Slash Shift command.

ShowErrors searches the cell you are currently pushed for unselected rectangles on the highLightError layer. If no rectangles are found on the highLightError layer the message No errors to show is printed, if all rectangles on the highLightError layer are selected the message All errors are already selected is printed, otherwise the viewer is panned and scaled to show the neighborhood around the first unselected rectangle found on the highLightError layer, this rectangle is selected and an informative message about the error is printed.

To use ShowErrors, bringover the public parts of the DF file listed above and type ShowErrors to the CommandTool.

2. Generating CIF files

Flat CIF

DF File: /Indigo/ChipNDale/5.2/top/FlatCif19

Start program: CDCMosFlatCIF

CDNMosFlatCIF

Execute: use program menu

Flat CIF creates a CIF output without any hierarchy whatsoever. See the Program menu; the Flatcif module must be run before issuing the command. The load file sets up the CIF layer names and bloats; It is a pity, but not Chipndale's problem, that reasonable designs will end up with millions of rectangles, more than most available CIF input packages can handle.

Flat CIF generates CIF output of the whole design, not only the selection.

Do check manually if the right CIF layer names and bloats are used.

Hierarchical CIF

DF File: /Indigo/ChipNDale/5.2/top/cif19

Start program: CDCMosCIF

Execute: use program menu

CIF output of the whole design is generated, not only of the selection.

Do check manually if the right CIF layer names and bloats are used.

3. Plotting on the Color Versatec

DF File: /Indigo/ChipNDale/5.2/top/ColorPDPlot19

Start program: VersatecNMos

VersatecCMos

VersatecChipnsil

VersatecChipnsilBW

LilacCMos

Execute: Use the hard copy menu.

Anomaly: start the program before each plot, to make sure stipples are loaded.

Plot any portion of the design you wish by selecting an area using a mouse button with 'H' held down. Terminal will request the number of vertical strips of paper you want the plot printed on; each strip will be made into a PD file named "plot(i).pd" where i is 0..(#strips -1). The plot will be made as wide as the given number of strips will allow, at 40 inches per strip. As the PD file is being generated, a '.' will be printed for every horizontal band as it is completed. An arrow will travel down the screen indicating the current band under consideration; the phrase "finished plot(s)" indicates that all strips have been done. Now you have a PD file resident on your local disk which must be transferred to the Versatec.

Sending PD files to the Color Versatec

There is a new Peach interface which allows you to chat directly to the Versatec's server. Plot requests are automatically spooled and serviced in serial order.

The new Peach package requires that your Dorado be running the latest version of STPServer. Bringover /Indigo/postCedar5.2/top/stpserver.df into ///Commands/; start it up by saying "STPServer" to the CommandTool. To start sending the PD file, give the command:

% chat sleepy

to connect to the Chat interface with Sleepy, the Dicentra serving the color Versatec. The command to send the file is

>> Print <filename> <#copies> <title>

where the filename is [name of Dorado]<Cedar>subdirectory>filename.pd. For example, if you had created a vanilla IC plot on Seahorse, wanted only one copy, and wanted your username as a title on the plot, you would give the command

>> Print [SeaHorse]<Cedar>temp>plot0.pd 1 Smith.pa

Your print request would now queued and would be handled on a first-come first-served basis. The official documentation for the new Peach software can be found under

/Indigo/peach/documentation/peachdoc.tioga.

It's recommended reading.

Completed plots are cut off each night and left for pick-up on a table in the Purple Lab. Users are strongly discouraged from cutting off their own plots. (It is fairly difficult to install the paper properly such that the next user gets good registration on his/her plot.)

You can easily change the colors assigned to layers by editing the load files VersatecCMOS.load and VersatecCMOS.load.

4. Plotting on the Black&White Versatec

DF File: /Indigo/ChipNDale/5.2/top/vplot19

Start program: run vplot

Commands: Use the hard copy menu.

Manipulate the design in the viewer so that you can see the entire amount of information you want to print. Hold down H , and with the left button down, draw a rectangle containing that part of the design that you want to come out on paper. When you release the button, Terminal will ask you to select the number of strips you want the design to be printed on (for all you VLSI wallpaper fans). A new viewer will appear, showing the middle of the horizontal stripe currently under consideration. An arrow pointing to the design will show you how far the transfer has progressed. After the transfer is complete, the connection to the Alto will be closed and the Trident file "plot.bits" will be printed on the Versatec. This routine should not break even on large and complex designs.

5. Press files

DF File: /Indigo/ChipNDale/5.2/top/PressPlot19

Start program: CDPressPlot

Commands: Use the hard copy menu.

Only black and white! No stipples. Usefull for chipnsil.

Use press printer (Rock'roll or Styinger) does not work on spruce or ShowPress. Do not use ShowPress to look at your plot; this would crash Cedar. Sorry, the program is quite slow.

7. Generating EBES masks

DF File: /Indigo/ChipNDale/5.2/top/ebesmask19

Startprogram: CDxCMOSEBES.cm, then Program menu

Do check the commandfile before usage! The df file contains more useful commandfiles.

8. Generating Labels

DF File: /Indigo/ChipNDale/5.2/top/label19

Start program: CDLabels

Commands: Use the rect-program-menu.

Command asks for a font name, a scaling factor and a text.

A cell for the label is created included into the design. It uses the current layer for the material of the cell.

The program tries to re-use characters made before; It uses their cell name; renaming of characters should therefore be done carefully or not at all.

It might be a good idea to make a special file containing the labels and importing them. Labels consist of surprisingly many rectangles, which do not always need be read or written.

To reduce the count of rectangles it is good to use a small font and a big scale factor.

9. Counting features

DF File: /Indigo/ChipNDale/5.2/top/CDCounting19.df

Counting all the (flat) rectangles of a design

Start program: run CDCountCommands

Command: Use program menu.

Counting static features of all designs

This is more of a debug tool than real user stuff.

Start program: run SweepCollectableStorageImpl CDCount

Commands: CDCount (to the command-tool)

Command will analyze all of the virtual memory and write how many Applications, Objects, Cells and Designs are stored totally.

10. Reading CIF Files

DF File: /Indigo/ChipNDale/5.2/top/ReadCif19.df

Start program: XeroxNmosCif, XeroxCmosCif, MosisCmosCif, StanfordCmosCif, etc.

Commands: ReadCif <filename>(.cif)

Maintainer: Jim <Gasbarro.pa>

ReadCif is a package for reading cif format files. It implements all of the cif primitives defined in Mead and Conway including arbitrary (i.e. non-rectilinear) polygons, wires, flashes, etc. Reading cif files can be complex for several reasons: 1) there is no standard definition for cif layer names and 2) cif files usually represent the mask image rather than the drawn image. ReadCif attempts to deal with these problems by allowing the user to specify in a command file the cif name to associate with a Chipndale layer and a compensation to apply when drawing the object.

Running ReadCif

ReadCif currently knows about the following technologies: XeroxCmosCif, XeroxNmosCif, MosisCmosCif, StanfordCmosCif, and ChipwichNmosCif. These names are command files which can be run from the Commander to register a particular technology with Chipndale. These command files register a new command "ReadCif" which is then used to read a cif file. ReadCif defaults the .cif extension if it is not supplied. Examples:

% XeroxCmosCif

% ReadCif Frog.cif

% ReadCif Cow

% StanfordCmosCif

% ReadCif Pig

...etc.

Making a new command file

The best way to make a new technology command file is to start with an existing one. ReadCif19.df contains several. Pick the one which is closest to you application.

The first line of the command file insures that the Chipndale technology you expect to use is loaded. Currently this can either be CDCmos or CDNmos. ReadCif has to register a Chipndale technology type when it creates a new design. It selects the technology type based upon the first character of the first layer command in the cif file. For example if the fist layer command is:

L ND;

ReadCif will create the design using Chipndale Nmos technology. Similarly, for the cif command:

L CNW;

ReadCif will create a design using Chipndale Cmos technology.

A layer is registered with Chipndale by issuing an interpreter command of the form:

← %CDProperties.PutPropOnLevel[onto: %CMos.met2, prop: $CDxCIFName, val: "CM2"]

This associates the cif layer name CM2 with Chipndale layer %CMos.met2 which is really just second layer metal. A more complicated registration would be:

← %CDProperties.PutPropOnLevel[onto: %CMos.nwel, prop: $CDxCIFName, val: NEW[%CIFIntPhase2.CIFDestRec ← [cifDest: "CNW", deltaRadius: -4000 -- nm --]]]

This associates cif layer name CNW with Chipndale layer %CMos.nwel and in addition causes ReadCif to bloat the geometry by 4 microns (the sign of the transformation indicates the change in size when the cif file was generated, this is for compatibility with BrandyCIFter). Mask compensation is done in a simple-minded manner; rectangles that were touching before compensation may end up disjoint, so be careful when using compensation.

If a layer command is specified in the cif file, but no such layer is registered with ReadCif then a warning message is printed on the terminal and all future objects on that layer are discarded. This allows extra layers (such as implant masks associated with diffusions) to be thrown away intentionally.

It is strongly recommended that each command file register some cif layer name with every Chipndale layer. This prevents interference from previously run command files. To find out the valid Chipndale layers for a particular technology, look in the file: