[Indigo]<Chipndale>documentation>ChipndaleTools18.tioga!7

ChipndaleTools18.tioga

last edited by: Christian Jacobi November 30, 1984 5:35:30 pm PST

CHIPNDALETOOLS 0.18

CHIPNDALETOOLS 0.18 — FOR INTERNAL XEROX USE ONLY

Chipndale

An interactive editor for VLSI designs

Some additional tools

Release 0.18

Ch. Jacobi, Kim Rachmeler (Nov 30, 1984)

A relatively incomplete documentation.

Filed on: [Indigo]<Chipndale>Documentation>ChipndaleTools18.tioga

Abstract: Chipndale, is an interactive graphic layout tool made to run in Cedar. Chipndale makes use of multiple windows, extensive parallel processing, vast amounts of memory, pop-up menus, and other assorted goodies. When complete, Chipndale will have a DRC and circuit extractor, a fast set of IO and checkplot routines, and modular device extensibility. What's more, everything in Chipndale will be completely technology independent, that is, all the features will be equally at home dealing with PC boards or CMOS chips.

This document document tells the designer about additional tools, like generating checkplots, masks, CIF output

XEROX Xerox Corporation
Palo Alto Research Center
3333 Coyote Hill Road
Palo Alto, California 94304

For Internal Xerox Use Only

0. General programs to run in Chipndale

Abort the program: <ESC><DEL> aborts most programs; all which do query for abort as they should.

The program menu: <SPACE>-<P> shows a menu of programs to run.

The rect program menu: <SHIFT>-<P>-middle shows also a menu of programs to run. The command allows you first to drag a rectangular area; This area is provided the program as a parameter.

Usually programs must be started first, only thereafter they register their commands. However some very important programs may have tiptable entries of their own.

1. Design rule checking

DF File: /indigo/chipndale/5.2/top/Spinifex18

Start program: nmosSpinifex

or cmosSpinifex

DRC/Extraction

(contributed by Mark Shand)

Spinifex - the ChipNDale DRC/Extraction Package

August 9, 1984

DF file: /indigo/chipndale/5.2/top/Spinifex17.df

Documentation: SpinifexDoc.tioga (in DF file)

Maintainer: Shand

The Spinifex DRC/Extraction Package is ready for use by ChipNDale designs. What follows is a list of problem areas a new user may encounter, for more details see the documentation.

1) The design rules are not 100% complete, this is particularly true of rules with regard to well contacts (though Spinifex does insist that wells are connected to by one and only one node).

2) There is no support for `wspec' files as yet (this is coming soon).

3) The .thy files produced require some hand editing, I hope to reduce or eliminate this.

4) Aliases for signal names are not handled fully, currently one name is chosen and a comment is insert in the .thy file indicating the choices which were available to Spinifex.

5) Strays are fairly accurate but there could be bugs in this computation (if there are it is only a few percent error).

6) Spinifex could be both faster and less greedy for VM.

Spinifex/HighlightNode - highlighting electrically connected regions.

August 9, 1984

Spinifex has the ability to interactively highlight electrical nodes the command is invoked by MiddleDown WHILE Slash. If material on the current layer is found at the point indicated and it is part of a cell which has been previously extracted then all regions electrically connected to that region have boxes on the ChipNDale highlightShade level laid over them. Be warned that shading does not extend to material in cells which have not been analyzed or above the current pushed in level.

ShowErrors

July 26, 1984

DF file: /indigo/chipndale/5.2/top/ShowErrors.df

Documentation: ShowErrorsDoc.tioga (in DF file)

Maintainer: Shand

ShowErrors implements a simple command to zoom a ChipNDale viewer to a rectangle on the highLightError layer. (How these rectangles get on the highLightError layer is another matter altogether, Spinifex—my layout analysis package and PTiler—Bob Mayo's module generating system are two ChipNDale clients that display errors as rectangles on the highLightError layer.)

ShowErrors is invoked by the Slash Shift command.

ShowErrors searches the cell you are currently pushed for unselected rectangles on the highLightError layer. If no rectangles are found on the highLightError layer the message No errors to show is printed, if all rectangles on the highLightError layer are selected the message All errors are already selected is printed, otherwise the viewer is panned and scaled to show the neighborhood around the first unselected rectangle found on the highLightError layer, this rectangle is selected and an informative message about the error is printed.

To use ShowErrors, bringover the public parts of the DF file listed above and type ShowErrors to the CommandTool.

2. Generating CIF files

Flat CIF

DF File: /indigo/chipndale/5.2/top/FlatCif18

Start program: @CDxCMosFlatCIF.cm

Flat CIF creates a CIF output without any hierarchy whatsoever. See the Program menu; the Flatcif module must be run before issuing the command. The commandfile CDxCMosFlatCIF.cm sets up the CIF layer names and bloats for CMOS; It is a pity, but not Chipndale's problem, that reasonable designs will end up with millions of rectangles, more than most available CIF input packages can handle.

NMos has no CIF layer names commandfile, but the actual flat-cif program is technology independent.

Hierarchical CIF

DF File: /indigo/chipndale/5.2/top/cif18

Start program: @CDxCMosCIF

No conditional objects !

3. Plotting on the Color Versatec

DF File: /indigo/chipndale/5.2/top/colorvplot18

Start program:

@VersatecNMos.cm

or @VersatecCMos.cm

or @VersatecChipnsil.cm

Commands: Use the rect program menu.

Creating The Plot

<QUOTE>-Left

The files necessary to run the plotter are brought over with the DF file

/indigo/chipndale/5.2/top/cddesign.df

If you have reason to believe that the necessary modules are not available, or that the standard DF file is doing you dirt, the file /indigo/chipndale/5.2/top/colorvplot17.df is the ultimate truth -- bring it over as a last resort.

Independently whether Chipndale is already running or not, execute the command:

% VersatecCMOS or

% VersatecNMOS

in the same directory where you are running Chipndale to set up the appropriate software and colors.

Now you need to get your design on the screen (if it's not there already). Execute one of the following:

% CDRead <name of Chipndale file> or

% CDReadCMCMOS <name of Chipmonk CMOS file> or

% CDReadCMNMOS <name of Chipmonk NMOS file>

to read in your ".chip" or ".dale" file.

Plot any portion of the design you wish by selecting an area using the left mouse button with 'quote' held down. Terminal will request the number of vertical strips of paper you want the plot printed on; each strip will be made into a PD file named "plot(i).pd" where i is 0..(#strips -1). The plot will be made as wide as the given number of strips will allow, at 40 inches per strip. As the PD file is being generated, a '.' will be printed for every horizontal band as it is completed. An arrow will travel down the screen indicating the current band under consideration; the phrase "finished plot(s)" indicates that all strips have been done. Now you have a PD file resident on your local disk which must be transferred to the Versatec.

Sending PD files to the Color Versatec

There is a new Peach interface which allows you to chat directly to the Versatec's server. Plot requests are automatically spooled and serviced in serial order.

The new Peach package requires that your Dorado be running the latest version of STPServer. Bringover /indigo/postCedar5.2/top/stpserver.df into ///Commands/; start it up by saying "STPServer" to the CommandTool. To start sending the PD file, give the command:

% chat sleepy

to connect to the Chat interface with Sleepy, the Dicentra serving the color Versatec. The command to send the file is

>> Print <filename> <#copies> <title>

where the filename is [name of Dorado]<Cedar>subdirectory>filename.pd. For example, if you had created a vanilla IC plot on Seahorse, wanted only one copy, and wanted your username as a title on the plot, you would give the command

>> Print [SeaHorse]<Cedar>temp>plot0.pd 1 Smith.pa

Your print request would now queued and would be handled on a first-come first-served basis. The official documentation for the new Peach software can be found under

/indigo/peach/documentation/peachdoc.tioga.

It's recommended reading.

Completed plots are cut off each night and left for pick-up on a table in the Purple Lab. Users are strongly discouraged from cutting off their own plots. (It is fairly difficult to install the paper properly such that the next user gets good registration on his/her plot.)

You can easily change the colors assigned to layers by editing the command files VersatecCMOS.cm and VersatecCMOS.cm.

4. Plotting on the Black&White Versatec

DF File: /indigo/chipndale/5.2/top/vplot18

Start program: run vplot

Commands: Use the rect program menu.

Manipulate the design in the viewer so that you can see the entire amount of information you want to print. Hold down <SHIFT>-<QUOTE> , and with the left button down, draw a rectangle containing that part of the design that you want to come out on paper. When you release the button, Terminal will ask you to select the number of strips you want the design to be printed on (for all you VLSI wallpaper fans). A new viewer will appear, showing the middle of the horizontal stripe currently under consideration. An arrow pointing to the design will show you how far the transfer has progressed. After the transfer is complete, the connection to the Alto will be closed and the Trident file "plot.bits" will be printed on the Versatec. This routine should not break even on large and complex designs.

5. Press files

DF File: /indigo/chipndale/5.2/top/PressPlot18

Start program: CDPressPlot

Commands: Use the rect program menu.

Only black and white! No stipples. Usefull for chipnsil.

Use press printer (Rock'roll or Styinger) does not work on spruce or ShowPress. Do not use ShowPress to look at your plot; this would crash Cedar.

6. CMos Color Hack

DF File: /indigo/chipndale/5.2/top/CMosColors18

Startprogram: run CMosColors

The program generates an iconic control viewer.

7. Generating EBES masks

DF File: /indigo/chipndale/5.2/top/ebesmask18

Startprogram: CDxCMOSEBES.cm, then Program menu

Do check the commandfile before usage! The df file contains more useful commandfiles.