<> <> <> <> DIRECTORY CD USING [lambda, DesignNumber], SpinifexCircuit USING [CellPostProcessProc, CircuitConstraint, CombineNodePropertyProc, ConversionProc, SpinifexLayerIndex, BoxMapProc], SpinifexOutput USING [LinkagePrintProc] ; CMosSpinifex: CEDAR DEFINITIONS ~ BEGIN ndifSpinifex: SpinifexCircuit.SpinifexLayerIndex ~ 0; pdifSpinifex: SpinifexCircuit.SpinifexLayerIndex ~ 1; polSpinifex: SpinifexCircuit.SpinifexLayerIndex ~ 2; metSpinifex: SpinifexCircuit.SpinifexLayerIndex ~ 3; m2Spinifex: SpinifexCircuit.SpinifexLayerIndex ~ 4; wellSpinifex: SpinifexCircuit.SpinifexLayerIndex ~ 5; <<-- These numbers are halved (sorry about any confusion this may cause)>> difSep: CD.DesignNumber~3* nDifToWell: CD.DesignNumber~5* nDifLayerSep: CD.DesignNumber~MAX[difSep, nDifToWell-difSep]; difToPolExtSep: CD.DesignNumber~0; polSep: CD.DesignNumber~ metSep: CD.DesignNumber~3* m2Sep: CD.DesignNumber~2* difToPolSep: CD.DesignNumber~difToPolExtSep+polSep; -- not halved! contactWidth: CD.DesignNumber~4* CircuitConstraint: TYPE ~ SpinifexCircuit.CircuitConstraint; nDifChannel: REF CircuitConstraint; buriedNDifPol: REF CircuitConstraint; pDifChannel: REF CircuitConstraint; excludePolByNDif: REF CircuitConstraint; excludePolByPDif: REF CircuitConstraint; channelEdge: REF CircuitConstraint; polXorDif: REF CircuitConstraint; polAndDif: REF CircuitConstraint; ConvTransistor: SpinifexCircuit.ConversionProc; ConvertPDifRect: SpinifexCircuit.ConversionProc; InitContacts: PROCEDURE; ConvertContact: SpinifexCircuit.ConversionProc; RoseTransistor: SpinifexOutput.LinkagePrintProc; ThymeTransistor: SpinifexOutput.LinkagePrintProc; CopyWellConnections: SpinifexCircuit.CombineNodePropertyProc; CheckWellConnections: SpinifexCircuit.CellPostProcessProc; AttachNWellContact: SpinifexCircuit.BoxMapProc; END.