PTiler serves two purposes. The first is to provide convenient primitives for the layout of VLSI structures, and the second is to allow module generators to be run interactively from ChipNDale. As a result, a PTiler generator sits between PTiler's user-interface and its layout back-end. A generator will register itself with PTiler, later PTiler may invoke the generator on the user's behalf. The generator will then prompt for input parameters, construct a module (using the PTiler layout primitives), and return the module to PTiler to be placed into the user's design or to be written out to a file.

This PTiler implementation is specific to ChipNDale. However, it is likely that another implementation could be written for another layout editor without changing the interface. Thus, PTiler module generators have some degree of portability.

Tiles are the basic building block out of which modules are built. They are cells of geometry with some special features. The most important special feature is the existence of alignment marks. Alignment marks (or marks for short) are named points in a cell. PTiler places down new cells by aligning a mark on the new cell with a mark on a previously placed cell. For example, you can tell PTiler (using the AlignCell procedure) to place down the cell inverter next to cell driver such that point out on inverter coincides with point in on driver. By changing the location of these marks the tile designer can control the alignment and overlap of the tiles placed by the module generator.

In addition to user-supplied marks, there are 4 special marks called left, right, top, and bottom that always exist. The user may define these marks, but if they aren't defined PTiler will assume that they are located at the center of the appropriate edge. It is especially easy to align cells using these 4 marks because PTiler provides a procedure (AdjacentCell) that implicitly names these marks. AdjacentCell places a new cell next to another cell (above, below, to the right of, or to the left of) in a particular orientation (mirrored, rotated, etc.).

I'm one of those people that learns best by example, so let's jump right in.......

Here is the Mirror module generator. It's a very simple one -- it arrays a cell in the usual manner but can mirror alternate rows and columns.

MirrorProc keeps three sorts of information: parameters set by the user, state information, and a constant to make up for the fact that CDOrient does not have a mirrorY constant. When it executes it queries the user for parameters and initializes its data structures. prevTile is a pointer to the last cell placed, and prevRow is a pointer to the first tile in the previous row. orient contains the orientation of the cell about to be placed. As Mirror advances it calls CDOrient to flip orient in X and Y.

The calls to AdjacentCell actually place down the tiles. AdjacentCell takes prevTile (or if a new row, prevRow) and places the new tile to the right of it (or if a new row, below it). The tile is placed with the orientation orient. The procedure AdjacentCell places cells by aligning the left, right, top, or bottom marks on those cells. If a more complex placement was desired (using different marks, for instance), the AlignCell routine would be used instead. There is even a way to place cells at absolute coordinates, but I doubt that you will want to do that.

After all the tiles are placed, the result is returned to PTiler which will do some checking (see the Verification section) and place the module into the user's design or write it out to a file.

There are other procedures for stretching tiles, placing down pins & new alignment marks, and other operations -- see the reference manual for details.

This section is a proposal, not a description of an implementation.

Sometimes a module generator needs to be able to stretch tiles or particular parts of tiles (such as Vdd or Ground). PTiler provides the ability to stretch tiles in certain ways. The functionality is best described by explaining the construct provided, called stretch-rects.

A stretch-rect is a rectangle on a particular layer -- just like a normal ChipNDale rectangle. However, in addition to its default size it has a maximum size shown as a dotted outline. The stretch-rect also has an arrow with a label attached and this label names a register maintained by the module generator. When a tile is placed, all stretch-rects in it are expanded in the direction of the arrow by the amount specified by their registers. If a stretch-rect needs to be expanded to more than its maximum size the entire cell will be stretched by the surplus amount in order to make room.

This section isn't even a complete proposal.

Module generators often need some automatic routing in portions of their modules, and a river router would often be sufficient. River routers are simple to write, the main problem being one of finding a convenient input specification. I think that PTiler should have such a router, but there is not one now.

In addition to a name, alignment marks may have checking information associated with them. A mark called

Note that this mechanism places the checking information into the set of tiles. This means that the module generator does not have to know about any particular peculiarities of the set of tiles being used -- the tile designer is the person that decides what alignments need to be verified.

This section is missing, since the interface is not solid yet. Eventually we will have the ability to stretch cells, and I will figure out what we want to do with pins.