[Indigo]<Chipndale>5.2>Alps20>PWAlpsDoc.tioga!2

PWAlpsDoc.tioga

Created by Bertrand Serlet, May 2, 1985 3:39:09 pm PDT

Last Edited by: Serlet, June 27, 1985 12:12:08 pm PDT

HOW TO USE PWAlps

CEDAR 5.2 — FOR INTERNAL XEROX USE ONLY

PWAlps: Generating Layout from boolean equations

Preliminary documentation

Bertrand Serlet

Abstract: PWAlps has nearly the same functionality as a PLA generator. It uses a library of cells, a set of user-defined parameters including either truth-table or program generating boolean equations, and generates Alps structures with the help of PatchWork. Alps is particularly adapted to small problems (a dozen of inputs, a dozen of outputs), and has a better topology than PLA for generating Finite-State-Machines. It can be used interactively from ChipnDale.

[If you are reading this document on-line, try using the Tioga Levels menus (if you can) to initially browse the top few levels of its structure before reading it straight through.]

XEROX Xerox Corporation
Palo Alto Research Center
3333 Coyote Hill Road
Palo Alto, California 94304
For Internal Xerox Use Only

0. Introduction

Alps is not just another PLA generator. PLAs are laid out from equations represented in sum of products (=Disjunctive Normal Form =D. N. F.), while Alps is using a completely different compact representation. It is combinatorial logic with pull-down chains and cascode switches. More to come later on this subject in AlpsDoc.

1. The equation handling

The only thing to know about it without entering into details is that optimisation consists mainly in permuting variables.

2. The Truth Table and Boolean Equations

You can specify your equations with a truth table, or with an expression which evaluates to a set of boolean equations (for the latter one, if you really need that, come and see mee). Names listed under the "Inputs" and "Outputs" options are the names of the entries if the input is a truth table. If a name belongs both to the Inputs and the Outputs, it is assumed that the output is latched and fed back to the input using a two non-overlapping clocks scheme. Some cells exist in the Alps cell library for latching.

The truth table is specified in "Berkeley format", i.e. something like

01010101 | 10001000

01000101 | 10011000

01110101 | 11101100

01000101 | 00001010

00010101 | 00100000

01-00101 | 10101001

In fact, some zeros, can be replaced by dots or minus signs, depending on the plane in which they occur. Do not add comments even preceded with "--". Spaces are OK.

On the left side is the AND plane, where every column represent an input; on the right side the OR plane and the outputs. The rows are of course product terms. This PLA-like representation is not the one used internally.

This format is not too smart, and we'll probably evolve towards something that incorporates the inputs and outputs names and types.

3. Options

The alps description is a file (name suffixed by ".alps", by convention) that contains the following options. Most of them are similar to PWPla description file.

TileSet ← "File where to get the tiles for the PLA"; -- Can be defaulted

Only change the default tiles if you know what you are doing. Come and see me!

TruthTableFile ← "FileContainingMyFavoritePLA.tt"; -- Required if equations not given by program

Inputs ← LIST["A", "reset", "in9"]; -- Both Required

Outputs ← LIST["out1", "busCmd3"];

Names of the input and output signals to the PLA. If the same name appears in both inputs and outputs, PWAlps assumed this is a Latched wire.

Optimize ← TRUE; -- Optional. Default is TRUE

DistanceBetweenGlue ← 6; -- Optional.

If you have a small structure, meaning no strong timing constraint, you can set this parameter to 99, so never to put glue. Assuming you put DistanceBetweenGlue to 4 you can count 0.6 ns per input for the maximum delay.

DistanceBetweenContacts ← 10; -- Optional.

If you have a small structure, meaning no long poly lines, you can set this parameter to 99, so never to put contacts between poly and metal2.

Debug ← FALSE; -- Optional. Default is FALSE

Internal flag used only for program debugging.

4. Becoming a user

First bringover [indigo]<chipndale>5.2>top>Alps20.df in your default working directory (if you want to use it in an other directory, first copy the files "AlpsDefaultParameters.alps" and "PW.TIP" in your default working directory. Those files were brought over with the .df file). PWAlps uses PW20, CD20 and Cedar 5.2.

If you have not already done it for PatchWork, look in your profile for the line describing the TIP table for ChipnDale, and add "///MyDefaultWorkingDirectory/PW.TIP". My entry looks like this:

Chipndale.CMos.TIP: ///MyDefaultWorkingDirectory/PW.TIP Default

Now to start PWAlps, issue the command

% runPWAlps

after running Chipndale.

Space-U calls the PW menu, and "Run MakeAlps generator" should be available. The Alps generator package comes with a complete example including

NW.alps -- the PLA decription

NW.tt -- its truth table

So just try it. Click the command "Run MakeAlps generator", provide the file name NW.alps and you should get a medium size Alps structure. Expect to wait a few minutes for a dozen inputs problem (like NW.alps), with plenty of nonsense messages on the Terminal. Of course, the use of the optimizer has increased the response time. Alps is still under development, and next releases should improve the displayed messages and the time for the generation. Perhaps also the layout area ...