chip [ 1229 , 1230 ]
cell 1 pos [ 200 , 200 ] size [ 211 , 217 ]
  name C1SnX0N15 side n offset 50
cell 2 pos [ 811 , 200 ] size [ 202 , 205 ]
  name C2SsX1N15 side s offset 100
cell 3 pos [ 200 , 817 ] size [ 217 , 213 ]
cell 4 pos [ 817 , 805 ] size [ 212 , 211 ]
net tie C2SsX1N15 tie C1SnX0N15
end