chip [ 800 , 400 ]
cell 1  pos  [ 100 , 100 ] size [ 600 , 200 ]
  name D1 side n offset 400
  name E1 side n offset 500
  name D2 side s offset 100
  name E2 side e offset 100
net tie D1 tie D2
net tie E1 tie E2
end