// MDdecl.d -- declarations for MicroD
// last edited July 8, 1980  5:54 PM

manifest [
		// Memory sizes
	IFUMsize = 1024
	IMsize = 4096	// do not increase this!!!
	ALUFMsize = 16
	RMsize = 256
		// Abort codes for Err
	Fatal = 0
	PassFatal = 1
	NonFatal = 2
	PassMessage = 3
		// Listing codes -- ls 0 means don't list IM
	listPrintMB = -2
	listNotIM = -1
	listConcise = 0
	listAbsOnly = 1
	listFull = 2
]

structure IM :
// The comment describing each field begins with a sequence of characters
// representing the phases that use it.  The first of these is the phase that
// sets the field.  The characters have the following meaning:
//	*,0,1 - Load (i.e. generated by Micro)
//		0=for D0, 1=for Dorado, *=for all
//	L - Link
//	A - Alist
//	P - Placement (Assign)
//	D - Dump
[			// First 2+ words are microinstruction

	iw0	word	//*   D
  =	Linkinit	word
	= [	jbcLinked bit	// LAP  Same group of 20B if set
		aLinked bit	// LAP  An aLink points to this instr
		blank bit 2
		aLink bit 12	// LAP  Link to next element in +1 list
	  ]

	iw1	word	//*   D
	// D0
	= [	blank bit 2
		newpage bit 4	//0L    new page # (F2) if swpage set
		blank bit 10
	  ]
  =	mask	word	// LAP  Mask of valid placements in group of 20B

	iw2 word	//*   D
	= [	blank bit 4
		disptab bit 12	//*LAP  dispatch table #
	  ]

	W0word	word
=	[ brkP	bit	//*   D Set breakpoint here
		= IFUE	bit	// LAP  An IFU dispatch instruction
	  atW0	bit	//*L    W0 is the abs addr of this instr
		= atWord	bit	// LA   Low 6 bits of W0 are abs word in page
	  global	bit	//1L    A global call location
		= IFUseq bit	// L    In a multi-instruction IFU entry sequence (*** MDprescan knows IFUseq=global)
	  onPage	bit	//*LAP  High 6 (or 4) bits of W0 are abs page for this instr
		= placed bit	//    D Instruction was placed successfully
	  W0	bit 12	//*LAPD Abs addr of this instr if atW0 eq 1
			//	Abs page for this instr if onPage eq 1
	]

	W1word	word
=	[ returns	bit	//*L    Does a RETURN, CORETURN, IM read/write, or
				// TPC read/write
	  calls	bit	//*L    Does a CALL or CORETURN (place next at .+1)
	  jbc	bit	//1L    Has a branch condition in JCN
		= oddcall bit	//0L    CALL to be placed at an odd location
	  usesFN	bit	//1L    FN field unavailable for long goto/call
		= swpage bit	//0L  C newpage has new page # for next instr's JA
	  W1	bit 12	//*L    Imaginary addr branched to from this instr
	]
=	SymPtr	word	//    D Points to symbolic name
=	groupLink	word	//   P  Links instructions to be placed on same pass

	W2word	word
=	[ branches	bit	//1L    Does a BRANCH
		= marked bit	//  AP  multi-use mark bit
	  goes	bit	//1L    Does a GOTO
		= longgo bit	//0L    programmer says instr does a long branch
	  emulator	bit	//*   D Instruction is for an emulator task
	  iscond	bit	//*L    Has a branch condition
	  W2	bit 12	//*L    2nd imag addr of DBLxxx or .+1
		= bLink bit 12	// LAP  Link to next element in page ring
	]
=	absPtr	word	//    D Pointer to source info for this ABSOLUTE location

]

manifest [ lIM = size IM/16 ]

// Bits of W0word to preserve from assignment pass

manifest [ W0mask = 17777b ]	// placed, W0


// Reserved values in W1 and W2

manifest [
	WNext = 7777b	// from Micro, means .+1
	WNull = 7777b	// internally, null address (end of list)
	WExt = 7776b	// internally, external reference

	NImax = 7775b	// max # of instruction words
]

manifest	// placement constraints for IM words
[	// Dorado model 0
	globalZero0 = 6077B	// globals must be zero in these bits
	ifuZero0 = 4003B	// IFU entries must be zero in these bits
	calledMask0 = 100200b	// call entries only at 0 mod 8
	goedtoMask0 = not calledMask0	// goto locations not at 0 mod 8
	jbctMask0 = 125000b	// JBC branches only to 0/1, 2/3, 4/5, 6/7
	ifuMask0 = 4010b	// IFU entries only at 4 mod 8
	pageIfuMax0 = 8	// max of 8 IFU entries on a page
	// Dorado model 1
	globalZero1 = 77B
	ifuZero1 = 3B
	calledMask1 = 100000b	// call entries at 0 mod 16
	goedtoMask1 = not calledMask1
	jbctMask1 = 5000b	// JBC branches to 4/5, 6/7
				// not 0/1 or 2/3 because 000x is reserved (sigh)
	ifuMask1 = 104210b	// IFU entries at 0 mod 4
	pageIfuMax1 = 16
	// Dorado both models
	globalMask = 100000b	// global entries only at 0 mod 64
	evenMask = 125252b	// for false cases of conditional branches
	oddMask = evenMask rshift 1	// for true cases
]

manifest	// other configuration parameters
[	// D0
	D0PageSize = 400b
	D0RMBlockSize = 100b
	// Dorado
	D1PageSize = 100b
	D1RMBlockSize = 20b
	//
	maxPageSize = 400b
	maxnPages = IMsize/100b
]


structure IFUM:
[	PA bit 1	// "packed alpha" bit, gets moved
	NENT bit 2	// # of consecutive entries
	blank bit 1
	IFAD bit 12	//Imag addr of instr dispatched to (7777B if unused)

	blank word	// other data
]
manifest [ lIFUM = size IFUM/16 ]


//Useful structures

structure [ lh byte; rh byte ]

structure BS:	// Bcpl string
[	length byte
	char^1,255 byte
]

structure [ bytes^0,999 byte ]


// Structure of source file record
structure Source:
[	next word	// link to next source file
	pFP word	// pointer to FP
	niFirst word	// NInstructions before loading
	niLast word	// NInstructions after loading
	lflag word	// listing flag
	pName word	// pointer to name
	pDate word	// pointer to write date string
]
manifest [ lSource = size Source/16 ]


// Structure of symbol value word
structure Sym:
[	memx bit 4
	addr bit 12
]


// Structure of IM mask chain
structure IMMASK:
[	next word
	addr word
	mask word
	nseq word
]
manifest [ lIMMASK = size IMMASK/16 ]


manifest	// Micro binary block types
[	MBend = 0	// ()
	MBdata = 1	// (sourceline, data)
	MBaddress = 2	// (memory, addr)
	MBfixup = 3	// (memory, addr, (firstbit, lastbit), value)
	MBmemory = 4	// (memory, width, name)
	MBsymbol = 5	// (memory, addr, name)
	MBexternalfixup = 6	// (memory, addr, (firstbit, lastbit), name)
]

manifest [ maxMBblock = 55 ]	// max block size, assuming 100-char symbol

manifest	// memory numbers
[	nMemX = 16	// max # of memories
	// For both D0 and Dorado
	IMmemx = 1
	RMmemx = 2
//	IMLOCKmemx = xxx
//	DISPmemx = xxx
//	IMMASKmemx = xxx
	// For D0
	// For Dorado
	IFUMmemx = 3
	ALUFMmemx = 4
//	RVRELmemx = xxx
]

manifest	// field specs for external references
[	W1field = (offset IM.W1)*401b+size IM.W1-1
	W2field = (offset IM.W2)*401b+size IM.W2-1
	IFADfield = (offset IFUM.IFAD)*401b+size IFUM.IFAD-1
]