; DMT2Test.asm
; Copyright Xerox Corporation 1979
; Last modified July 29, 1980  9:16 PM by Boggs

	.TXTM B

.DUSR	BREAK = 77400

; OUTGOING

.ENT	A2INIT, A2TMF, A2TMS, A2PBC, A2PEINT
.BEXTZ	XMFLAG, CHANGEBANK

; INCOMING

.BEXT	STOPETHER, STARTETHER
.BEXTZ	POCT, PDEC, PMSG1
.BEXTZ	RANDOM, ERROR
.BEXTZ	SOM, EOM, pACT, pWW, pIRET
.BEXTZ	pSBCTAB, pEBCTAB

	.SREL

A2INIT:		.A2INIT
A2TMF:		.A2TMF
A2TMS:		.A2TMS
A2PBC:		.A2PBC
A2PEINT:	.A2PEINT


SYNTAB:		.SYNTAB		; -> SYNDROME TABLE
ESTAB:		.ESTAB

	.ZREL

LOGBADBIT:	.LOGBADBIT
CHANGEBANK:	.CHANGEBANK

PATTERN:	0
TESTCELL:	0

AIICTRL:	177777		; VALUE TO BE LOADED INTO ERROR CONTROL REG
AIINCNR:	177775		; NO CORRECTION, DONT REPORT ERRORS
AIINCR:		177761		; NO CORRECTION, REPORT ERRORS
AIICR:		177763		; CORRECTION, REPORT ERRORS
AIICNR:		177777		; CORRECTION, DONT REPORT ERRORS

pMEAR:		177024		; MEMORY ERROR ADDRESS REGISTER
pMESR:		177025		; MEMORY ERROR STATUS REGISTER
pMECR:		177026		; MEMORY ERROR CONTROL REGISTER

DOUBLECNT:	0		; DOUBLE ERROR COUNT
LASTDOUBLE:	0		; ADDRESS OF LAST DOUBLE ERROR
BADSYNCNT:	0		; BAD SYNDROME COUNT
BADDATA:	0		; BAD READS IN SPITE OF CORRECTION!

XMFLAG:		0		; NON ZERO IF EXTENDED MEMORY PRESENT
pBANKREG0:	177740		; BANK REGISTER FOR TASK 0 (EMULATOR)
pBANKREG1:	177741
pBANKREG15:	177757		; BANK REGISTER FOR TASK 15

C3:		3
C7:		7

	.NREL

;----------------------------------------------------------------------------
.A2INIT:			; ALTO 2 INITIALIZATION
;----------------------------------------------------------------------------
	STA 3 A2INITRET

	MKZERO 0 0
	STA 0 TESTCELL		; SET FIRST TEST CELL

	LDA 0 @pMESR		; READ ERROR REGISTERS
	STA 0 @pMESR

	LDA 0 BANKTEST		; TEST PATTERN
	STA 0 @pBANKREG1	; STORE INTO BANK REGISTER
	LDA 1 @pBANKREG1	; READ IT BACK
	LDA 2 BANKMASK		; MASK OFF UNUSED BITS
	AND 2 1
	SE 0 1			; ARE THEY THE SAME?
	 JMP A2IEXIT		; DIFFERENT.  NO EXTENDED MEMORY
	COM 0 0			; INVERT THE TEST PATTERN
	AND 2 0			; MASK OFF UNUSED BITS
	STA 0 @pBANKREG1	; STORE INTO BANK REGISTER
	LDA 1 @pBANKREG1	; READ IT BACK
	AND 2 1			; MASK OFF UNUSED BITS
	SE 0 1			; ARE THEY THE SAME?
	 JMP A2IEXIT		; DIFFERENT.  NO EXTENDED MEMORY
	MKONE 0 0
	STA 0 XMFLAG

A2IEXIT:MKZERO 0 0
	STA 0 @pBANKREG1
	LDA 3 A2INITRET
	JMP 1 3			; SKIP RETURN

BANKMASK:	17
BANKTEST:	5
A2INITRET:	0

;----------------------------------------------------------------------------
.A2TMF:				; ALTO 2 TEST MEMORY FAST
;----------------------------------------------------------------------------
	STA 3 TMFRET

A2TMF1:	JSR @RANDOM		; PICK NEXT TEST CELL AT RANDOM
	LDA 1 SOM		; TEST FOR LOWER LIMIT
	SGEU 0 1		; SKIP IF GREATER OR EQUAL TO SOM
	 JMP A2TMF1		; ELSE PICK ANOTHER CELL
	LDA 1 EOM		; TEST LOWER LIMIT
	SLEU 0 1		; SKIP IF LESS THAN OF EQUAL TO EOM
	 JMP A2TMF1		; ELSE PICK ANOTHER CELL
	STA 0 TESTCELL

	JSR @RANDOM		; START OF MAIN TEST LOOP
	STA 0 PATTERN		; SAVE TEST VALUE
	JSR BASIC		; CALL BASIC TEST LOOP
	LDA 0 PATTERN		; DO TEST OVER WITH COMP DATA
	COM 0 0
	STA 0 PATTERN
	JSR BASIC

	ISZ BASICPHASE		; FLIP BETWEEN CORRECTING/NO CORRECTING
	 NOP

	LDA 3 TMFRET
	JMP 1 3			; SKIP RETURN

TMFRET:		0
BASICPHASE:	0		; CONTROLS KIND OF CORRECTION

;----------------------------------------------------------------------------
BASIC:				; BASIC TEST LOOP
;----------------------------------------------------------------------------
	STA 3 BASICRTN		; SAVE RETURN ADDRESS

	LDA 1 AIICR		; SET CORRECTION AND REPORTING
	STA 1 AIICTRL		; SET ERROR CONTROL REGISTER
	STA 1 @pMECR

	LDA 0 PATTERN
	COM 0 0			; WRITE BACKGROUND
	LDA 1 EOM
	LDA 2 SOM
	LDA 3 EOM
	SUB 2 3
	COM 3 3
	BLKS

	LDA 0 PATTERN
	LDA 2 TESTCELL
	STA 0 0 2		; WRITE TEST CELL

	LDA 0 BASICPHASE	; TRY IT WITH AND WITHOUT CORRECTION
	LDA 1 AIINCNR		; SET NO CORRECTION AND NO REPORTING
	SKEVEN 0 0
	 LDA 1 AIICR		; SET CORRECTION AND REPORTING
	STA 1 AIICTRL		; SET ERROR CONTROL REGISTER
	STA 1 @pMECR

	LDA 0 PATTERN
	COM 0 0			; THE DATA WE EXPECT
	LDA 2 SOM		; START OF TEST AREA
	LDA 3 EOM		; END OF TEST AREA

READLOOP:LDA 1 0 2		; FETCH A WORD FROM THE TEST AREA
	SE 0 1			; IS IT WHAT WE EXPECT?
	 JMP MAYBERR		; NO.
READLOOP1:INC 2 2		; ON TO NEXT LOC
	SGTU 2 3		; DONE?
	 JMP READLOOP		; NO

	STA 0 @pMESR		; RESET AND ENABLE ERROR LOGIC
	LDA 0 AIICR		; SET CORRECTION AND REPORTING
	STA 0 AIICTRL		; SET ERROR CONTROL REGISTER
	STA 0 @pMECR
	JMP @BASICRTN		; EXIT

MAYBERR: LDA 3 TESTCELL
	SE 2 3			; IS IT THE TEST CELL?
	 JMP ME1		; NO
	COM 0 0			; YES. TEST CELL CONTENTS ARE INVERTED
	SNE 0 1			; NOW IS IT WHAT WE EXPECT?
	 JMP ME2		; YES
ME1:	STA 2 SAVPLACE
	MOV 0 2			; AC1 XOR AC0
	ANDZL 1 2
	ADD 1 0
	SUB 2 0

	SUB 2 2
	STA 2 BITNO

ME5:	MOVZL 0 0 SZC		; FIND BAD BIT
	 JMP ME7		; LOG BAD BIT
ME6:	ISZ BITNO		; INCREMENT BIT NUMBER
	SNZ 0 0			; DONE ?
	 JMP ME4		; YES
	JMP ME5			; NO. LOOP

ME7:	STA 0 SAVBITS		; SAVE FOR MULTIPLE BIT ERROR TEST
	LDA 0 BITNO		; GET REAL BIT NUMBER
	LDA 3 C20
	LDA 1 SAVPLACE
	MOVZR# 1 1 SZC		; ODD MEMORY ADDRESS =>
	 ADD 3 0		;  BITS 16.-31.
	JSR @LOGBADBIT		; GO RECORD THE BAD BIT.
	LDA 0 SAVBITS		; RESUME TEST FOR MULTIPLE ERRORS
	JMP ME6

ME4:	LDA 0 C2		; IF WE WERE CORRECTING,
	LDA 1 AIICTRL		; AND GOT A DATA COMPARE ERROR,
	AND 0 1 SNR		;  IT'S SERIOUS
	 JMP ME3
	ISZ BADDATA		; SO COUNT THEM!
	 JMP ME3
	DSZ BADDATA		; CANT SKIP
ME3:	LDA 2 SAVPLACE		; RESTORE CLOBBERED REGISTERS
	LDA 0 PATTERN
ME2:	COM 0 0
	LDA 3 EOM
	JMP READLOOP1		; CONTINUE THE SWEEP

BASICRTN:	0
SAVPLACE:	0
RERTN:		0
SAVBITS:	0
BITNO:		0
C20:		20
C2:		2

;----------------------------------------------------------------------------
.A2TMS:				; ALTO 2 TEST MEMORY SLOW
;----------------------------------------------------------------------------
	STA 3 A2TMSRET

	DIR
	JSRII ppSTOPETHER
	MKMINUSONE 0 0		; INCREMENT
	JSR @CHANGEBANK
	JSRII ppSTARTETHER
	EIR

	LDA 3 A2TMSRET
	JMP 1 3			; SKIP RETURN

A2TMSRET:	0

;----------------------------------------------------------------------------
.CHANGEBANK:
;----------------------------------------------------------------------------
; INCREMENT IF AC0 NON ZERO, ELSE GOTO BANK 0
; INTERRUPTS MUST ALREADY BE DISABLED
	LDA 1 XMFLAG
	SNZ 1 1			; EXTENDED MEMORY PRESENT?
	 JMP 0,3		; NO.
	STA 3 CBRET

	SNZ 0 0			; GOTO BANK 0?
	 JMP CB2		; YES

CB1:	LDA 0 @pBANKREG0	; EMULATOR BANK REGISTER
	INC 0 0			; INCREMENT ALT BANK FIELD
CB2:	LDA 1 ALTBANKMASK
	AND 1 0			; MASK OFF EXCESS BITS
	COM 1 1
	LDA 2 @pBANKREG0
	AND 1 2			; ZERO THE ALT BANK FIELD
	ADD 2 0			; MERGE NEW ALT BANK WITH OLD NORMAL BANK
	STA 0 @pBANKREG0

	MKZERO 1 1		; TESTING LOCATION 0
	LDA 0 TESTVALUE
	XMSTA			; STORE IT
	XMLDA			; READ IT BACK
	LDA 2 TESTVALUE
	SE 0 2			; ARE THEY THE SAME?
	 JMP CB1		; NOPE.  TRY NEXT BANK
	COM 0 0			; INVERT TEST PATTERN
	MOV 0 2			; REMEMBER ITS VALUE
	XMSTA			; STORE IT
	XMLDA			; READ IT BACK
	SE 2 0			; ARE THEY THE SAME?
	 JMP CB1		; NOPE.  TRY NEXT BANK

	MKZERO 3 3		; FIRST ADDRESS
	LDA 2 EOM		; FOR LIMIT TEST
BLP:	LDA 0 0,3		; PICK UP DATA
	MOV 3 1			; XMSTA ADDRESS
	XMSTA			; INTO OTHER BANK
	INC 3 3			; BUMP ADDRESS
	SGTU 3 2		; DONE?
	 JMP BLP		; NO
	
	LDA 1 pRTC
	LDA 0 @pRTC
	XMSTA			; MOVE RTC INTO NEW BANK

	LDA 0 @pBANKREG0
	LDA 1 ALTBANKMASK
	AND 1 0			; ALT BANK # ONLY
	MOVZL 0 1
	MOVZL 1 1
	ADD 1 0			; ALT BANK # NOW IN NORMAL FIELD ALSO
	LDA 1 pBANKREG15
	LDA 3 M16D
	BLKS			; SWITCH ALL TASKS INTO THE NEW BANK

; insert cursor bank number code here

	MKZERO 0 0
	STA 0 @pMESR		; RESET ERROR CONTROL
	LDA 0 AIICTRL
	STA 0 @pMECR		; RESTORE CURRENT CONTROL VALUES
	
	LDA 0 @pACT		; IGNORE PARITY ERRORS CAUSED BY SWITCH
	MKZERO 1 1
	STA 1 @pACT		; MASK OFF ALL INTERRUPT CHANNELS
	EIR			; FLUSH PENDING INTERRUPTS INTO WW
	DIR
	LDA 1 @pWW
	MOVZR 1 1		; FORCE PARITY CHANNEL BIT TO ZERO
	MOVZL 1 1
	STA 1 @pWW
	STA 0 @pACT

	LDA 0 @pBANKREG0	; XMFLAG _ HIGHEST BANK SEEN +1
	LDA 1 ALTBANKMASK
	AND 1 0
	INC 0 0
	LDA 1 XMFLAG
	SGE 1 0
	 STA 0 XMFLAG

	LDA 3 CBRET
	JMP 0,3

CBRET:		0
TESTVALUE:	125252
ppSTOPETHER:	STOPETHER
ppSTARTETHER:	STARTETHER
ALTBANKMASK:	3
M16D:		-16.
pRTC:		430		; -> REAL TIME CLOCK
pCURSOREND:	450

;----------------------------------------------------------------------------
.A2PEINT:			; PARITY INTERRUPT ANALYZER
;----------------------------------------------------------------------------
	LDA 1 @pMEAR		; READ ERROR REGISTERS
	LDA 0 @pMESR
	LDA 2 C1000		; TEST FOR DOUBLE ERROR
	AND 0 2 SZR		; SKIP IF NOT DOUBLE BIT ERROR
	 JMP LOGDOUBLE
	COMZR 0 0		; EXTRACT SYNDROME
	LDA 2 C176
	ANDZR 2 0
	LDA 2 @ppSYNTAB		; CONVERT TO BIT NUMBER
	ADD 0 2
	LDA 0 0 2
	MOVL# 0 0 SZC		; SKIP IF GOOD SYNDROME
	 JMP BADSYN
	JSR @LOGBADBIT		; GO INDEX ERROR COUNT
	JMP FINPE		; FINISHED

LOGDOUBLE:STA 1 LASTDOUBLE
	ISZ DOUBLECNT		; INCREMENT DOUBLE ERROR COUNT
	 JMP FINPE		; FINISHED
	DSZ DOUBLECNT		; CANT SKIP
	 JMP FINPE

BADSYN:	ISZ BADSYNCNT		; INCREMENT BAD SYNDROME COUNT
	 JMP FINPE		; FINISHED
	DSZ BADSYNCNT		; CANT SKIP

FINPE:	STA 0 @pMESR		; RESETS MEMORY ERROR INTERFACE
	LDA 2 AIICTRL		; SET ERROR CONTROL REGISTER
	STA 2 @pMECR		; RE-ENABLES INTERRUPTS ON ERROR
	JMP @pIRET

ppSYNTAB:	SYNTAB

C176:		176
C1000:		1000

; A note about bit-to-chip correspondence.
;
; The Alto II memory system is organized around 32 bit doublewords.
; Along with each double word is 6 bits of hamming code and a parity
; bit for a total of 39 bits.
;
; Bits 0-15 are the even data word
; Bits 16-31 are the odd data word
; Bits 32-37 are the Hamming code
; Bit 38 is the ecc parity bit
;
; The bits in a 1-chip deep slice of memory are called a GROUP.
; A group contains 4K or 16 double words, depending on chip type.
; The bits of a group on a single board are called a SUBGROUP.
; Thus a subgroup contains 10 of the 40 bits in a group.
; There are 8 subgroups on a memory board.
; Subgroups are numbered from the high 3 bits of the address.
;	For 4K chips this means MAR[0-2]
;	For 16K chips this means BANK.MAR[0]
; Subgroup 7 is chip positions 81 - 90
; Subgroup 0 is chip positions 11 - 20
;
; The location of the bits in group 0 is:
;
;    BOARD 1          BOARD 2          BOARD 3          BOARD 4
; 32 24 16 08 00 | 33 25 17 09 01 | 34 26 18 10 02 | 35 27 19 11 03
; 36 28 20 12 04 | 37 29 21 13 05 | 38 30 22 14 06 | XX 31 23 15 07
;              ^                ^                ^                ^
;              |----------------|----------------|----------------|
;       chip position 11
;
; Chips 15, 25, 35, 45, 55, 65, 75, 85 on board 4 aren't used.
;
; A note about the format of the chip table.
;
; There are 39 used bits times 8 groups (see above)
; therefore, 39*8 = 312 used chips on the four boards.
;
; The table is organized so that entry j corresponds to:
; j_ (bit number in range 0-38.)*8 + (group number in range 0-7)
;
; if error reporting is enabled, then the bank in which the error
; occurred is in MESR[14-15], otherwise it is in the bank registers
; in high memory (which are all the same -- any one will do).
;----------------------------------------------------------------------------
.LOGBADBIT:	; ENTER WITH BIT NUMBER (0.-38.) IN AC0, ADDRESS IN AC1
;----------------------------------------------------------------------------
	STA 3 BADBITRET
	CYCLE 3
	MOV 0 3			; AC3 _ BIT NUMBER * 8
	MOV 1 0			; AC0 _ ADDRESS  (AC1 AND AC2 ARE FREE)
	LDA 1 C1000		; ALLOW FOR THE CONFIGURATION SWITCH
	LDA 2 @pUTILIN		; WHICH IS SENSED AS BIT 6 OF UTILIN
	AND 1 2 SNR		; AND TOGGLES MAR[0]
	 JMP LBB1
	LDA 1 C100000
	ADD 1 0			; AC0 _ AC0 XOR 100000

LBB1:	LDA 1 XMFLAG
	SNZ 1 1			; EXTENDED MEMORY?
	 JMP LBB2		; NOPE

	LDA 1 AIICTRL		; 16K CHIPS
	LDA 2 C14		; SINGLE- AND DOUBLE-ERROR MECR BITS
	AND 1 2
	LDA 1 @pMESR
	COM 1 1			; MESR READS OUT INVERTED
	SZ 2 2			; ERROR REPORTING ENABLED?
	 LDA 1 @pBANKREG0	; NO
	LDA 2 C3		; YES
	ANDZL 2 1		; AC1[13-14] _ BANK
	SP 0 0			; AC1[15] _ MAR[0]
	 INC 1 1
	JMP LBB3

LBB2:	CYCLE 3			; 4K CHIPS
	LDA 1 C7
	AND 0 1			; AC1[13-15] _ MAR[0-2]

LBB3:	ADD 1 3
	LDA 0 pSBCTAB		; UPDATE TABLE
	ADD 0 3
	ISZ 0 3
	 JMP LBBRET
	DSZ 0 3			; CANT SKIP

LBBRET:	JSR @ERROR		; NOTIFY REPORT GENERATOR OF ERROR
	JMP @BADBITRET		; FINISHED LOGGING

BADBITRET:	0
pUTILIN:	177030
C14:		14
C100000:	100000

;----------------------------------------------------------------------------
.A2PBC:				; ALTO 2 PRINT BAD CHIPS
;----------------------------------------------------------------------------
	STA 3 PSRET
	LDA 1 DOUBLECNT
	SNZ 1 1
	 JMP PBC1
	JSR @PDEC
	JSR @PMSG1
	 .TXT " double errors*N"
	JSR @PMSG1
	 .TXT " Last double error at "
	LDA 1 LASTDOUBLE
	JSR @POCT
	JSR @PMSG1
	 .TXT "*N"

PBC1:	LDA 1 BADSYNCNT
	SNZ 1 1
	 JMP PBC5
	JSR @PDEC
	JSR @PMSG1
	 .TXT " Bad Syndromes*N"

PBC5:	LDA 1 BADDATA
	SNZ 1 1
	 JMP PBC6
	JSR @PDEC
	JSR @PMSG1
	 .TXT " Improperly corrected reads*N"

PBC6:	LDA 2 pSBCTAB
	LDA 3 pEBCTAB
	MKZERO 1 1
PBC2:	LDA 0 0 2
	SZ 0 0
	 INC 1 1
	INC 2 2
	SGEU 2 3
	 JMP PBC2

	STA 1 NBCS		; NUMBER OF BAD CHIPS
	JSR @PDEC
	JSR @PMSG1
	 .TXT " Bad main memory chips*N"

	LDA 0 NBCS
	SNZ 0 0
	 JMP PBC4

	JSR @PMSG1
	 .TXT "*N Card Chip Errors*N"

	LDA 2 pSBCTAB
PBC3:	LDA 0 0,2
	SZ 0 0
	 JSR PER2		; PRINT A LINE DESCRIBING THE ERROR
	INC 2 2
	LDA 3 pEBCTAB
	SGEU 2 3
	 JMP PBC3

PBC4:	LDA 3 PSRET
	JMP 1,3

PSRET:		0
NBCS:		0

;---------------------------------------------------------------------------
PER2:	; CONVERT THE ADDRESS INTO CARD AND CHIP AND PRINT IT
;---------------------------------------------------------------------------
	STA 3 PE2RT
	STA 0 NERS
	STA 2 TADR
	LDA 0 pSBCTAB
	SUB 0 2
	STA 2 ESAVE
	MOV 2 0
	CYCLE 13.
	LDA 1 C3		; PRINT CARD
	AND 0 1
	INC 1 1
	JSR @PDEC

	LDA 0 ESAVE		; FORM CHIP ADDRESS
	CYCLE 11.
	LDA 2 C17
	AND 0 2
	LDA 0 @ppESTAB
	ADD 0 2
	LDA 0 0 2
	LDA 1 ESAVE
	LDA 2 C7
	AND 2 1
	LDA 2 C12
	MUL
	JSR @PDEC
	JSR @PMSG1
	 .TXT "  "

	LDA 1 NERS		; PRINT ERROR COUNT
	JSR @PDEC
	JSR @PMSG1
	 .TXT "*N"

	LDA 2 TADR		; RESTORE PLACE
	JMP @PE2RT		; EXIT

PE2RT:		0
NERS:		0
TADR:		0
C12:		12
C17:		17
ESAVE:		0
ppESTAB:	ESTAB

.ESTAB:	16.		; TABLE FOR CHIP LOCATING
	11.
	17.
	12.
	18.
	13.
	19.
	14.
	20.
	15.

; The syndrome table.
; Maps a 6 bit number (the syndrome) into the number of the bad bit
; (0-38), or -1 if the syndrome is incorrect.  This syndrome is the
; COMPLEMENT of what is read from MESR[8-13].

.SYNTAB:38.		; 0	ecc parity
	37.		;	hc5
	36.		;	hc4
	177777
	35.		;	hc3
	177777
	18.
	177777
	34.		;	hc2
	29.
	14.		; 10.
	177777
	7.
	177777
	22.
	177777
	33.		;	hc1
	27.
	12.
	177777
	5.		; 20.
	177777
	20.
	177777
	2.
	31.
	16.
	177777
	9.
	177777
	24.		; 30.
	177777
	32.		;	hc0
	26.
	11.
	177777
	4.
	177777
	19.
	177777
	1.		; 40.
	30.
	15.
	177777
	8.
	177777
	23.
	177777
	0.
	28.
	13.		; 50.
	177777
	6.
	177777
	21.
	177777
	3.
	177777
	17.
	177777
	10.		; 60.
	177777
	25.
	177777

	.END

	LDA 0 @pBANKREG0	; PUT THE BANK NUMBER IN THE CURSOR
	LDA 1 ALTBANKMASK
	AND 1 0
	LDA 2 @ppBANKTABLE	; INDEX BANK TABLE BY BANK NUMBER
	ADD 0 2
	LDA 0 @0,2		; GET POINTER TO BITMAP
	NEG 0 0			; SUBTRACT 1
	COM 0 0
	LDA 1 pCURSOREND
	LDA 3 M16D
	BLT

ppBANKTABLE:	BANKTABLE
		.SREL

ZERO:		.ZERO
ONE:		.ONE
TWO:		.TWO
THREE:		.THREE
BANKTABLE:	.BANKTABLE

		.NREL

.BANKTABLE:	ZERO
		ONE
		TWO
		THREE

.ZERO:		177777
		177777
		174077
		173737
		173737
		173737
		173737
		173737
		173737
		173737
		173737
		173737
		173737
		174077
		177777
		177777

.ONE:		177777
		177777
		177377
		176377
		177377
		177377
		177377
		177377
		177377
		177377
		177377
		177377
		177377
		174077
		177777
		177777

.TWO:		177777
		177777
		174077
		173737
		177737
		177737
		177737
		174077
		173777
		173777
		173777
		173777
		173777
		170037
		177777
		177777

.THREE:		177777
		177777
		174077
		173737
		177737
		177737
		177737
		174077
		177737
		177737
		177737
		177737
		173737
		174077
		177777
		177777