{File name <tajo>dbBusExt.mc	BX clauses removed
Description: Daybreak Interlisp Emulator Bus Extension

use daybreak assembler on dbBusExt.mc to make dbBusExt.si and dbBusExt.ml
use dlion assembler on dlBusExt.mc to make dlBusExt.eb and rename to dbBusExt

Assumes only reg mBusStat and mBusIData will be read, to avoid tight memory timing

Purcell  27-Jul-85 13:17:53 edited
Purcell  22-Jul-85 22:50:49 created from BusExt.mc of 17-Apr-85  1:34:04 PST
}

{INPUT:	TOSH _ smallpl, DISP4[MiscIn],	c1, at[0D,10, MiscDisp];}

{
(SETQ MBUS.OUTL (PLUS 0 (LLSH REG 4)))
(SETQ MBUS.OUTM (PLUS 11 (LLSH REG 4)))
(SETQ MBUS.INL (PLUS 9 (LLSH REG 4)))
(SETQ MBUS.INM (PLUS 10 (LLSH REG 4)))

(\DEVICE.OUTPUT DATA MBUS.OUTL)
(\DEVICE.OUTPUT DATA MBUS.OUTM)
(SETQ DATA (\DEVICE.INPUT MBUS.INL))
(SETQ DATA (\DEVICE.INPUT MBUS.INM))
}
RegDef[uDummy,	UY,	0];	
RegDef[uDat,	U,	0D];{uTOS}{~0D = mBusStat or mBusIData}

{OpTable: , c1, at[500];}
		
BusX:	Noop,						c2, at[09,10,MiscIn];{read L}
	TOS _ TOS LRot12, 				c3;
	Ybus _ TOS, AltUaddr,				c1;
	{Float.L, {TOS _ FloatResult}FloatA_ uDummy,}	c2;
pcInDn:	{TOS _ FloatA_ FloatResult,}			c3;

	GOTO[IB.nop],					c1;

	Noop,						c2, at[0A,10,MiscIn];{read M}
	TOS _ TOS LRot12, 				c3;
	Ybus _ TOS, AltUaddr,				c1;
	{Float.M, {FloatResult}FloatA_ uDummy,}GOTO[pcInDn], c2;


	Noop,						c3, at[0,10,MiscOut];{Write L}	
	Rx _ S + 2,					c1;
	Q _ rhS, 					c2;
	rhRx _ Q LRot0, 				c3;
			
	MAR _ Rx _ [rhRx, Rx + 0],			c1;
	TOS _ TOS LRot12,				c2;
	TT _ MD,					c3;
	
	uDat _ TT,					c1;
	Ybus _ TOS, {AltUaddr,} L2 _ L2.0, IBDisp,	c2;
	{Float.L,} Xbus _ uDat, L2 _ L2.0, DISPNI[OpTable], c3;


label:	Noop,						c3, at[0B,10,MiscOut];{Write M}	
	Rx _ S + 2,					c1;
	Q _ rhS,					c2;
	rhRx _ Q LRot0,					c3;
	
	MAR _ Rx _ [rhRx, Rx + 0],			c1;
	TOS _ TOS LRot12,				c2;
	TT _ MD,					c3;
	
	uDat _ TT,					c1;
	Ybus _ TOS, {AltUaddr,} L2 _ L2.0, IBDisp,	c2;
	{Float.M,} Xbus _ uDat, L2 _ L2.0, DISPNI[OpTable], c3;

	{ E N D }