{File name xLispMapB2.mc
Created: 24-Apr-84 10:00:25 
}

SetTask[0];

Set[L1.RestoreAndExit, 5],
Set[L1.RestoreAndPF, 6],

{*************************
	Read Map Update Subroutine 
**************************}
{Timing: 4 cycles}
{Enter at cycle 3, returns to cycle1}
{returns thru L0 if map fixed ok}
{returns thru L1 if wants to trap}


RLMapFixB2:
	Xbus ← Rx LRot0, XwdDisp,	c3;

	Map ← [rhTT,TT], DISP2[RFixRFlagsB2],	c1;

	MDR ← Rx or 10, L0Disp, GOTO[ReReadB2],	c2, at[0, 4, RFixRFlagsB2];
	MDR ← Rx or 10, L0Disp, GOTO[ReReadB2],	c2, at[1, 4, RFixRFlagsB2];
	MDR ← Rx or 10, L0Disp, GOTO[ReReadB2],	c2, at[2, 4, RFixRFlagsB2];
	L1Disp, GOTO[RWTrapB2],	c2, at[3, 4, RFixRFlagsB2];

ReReadB2:
	Xbus ← 1, XDisp, RET[RMapFixCallerB2],	c3;

{*************************
	Write Map Update Subroutine 
**************************}
{Timing: 4 cycles}
{Enter at cycle 3, returns to cycle1}
{returns thru L0 if map fixed ok}
{returns thru L1 if wants to trap}

WLMapFixB2:
	Xbus ← Rx LRot0, XwdDisp,	c3;
	Map ← [rhTT, TT], DISP2[FixWFlagsB2],	c1;

	MDR ← Rx or 030, L0Disp, GOTO[ReWriteB2],	c2, at[0, 4, FixWFlagsB2];
	MDR ← Rx or 030, L0Disp, GOTO[ReWriteB2],	c2, at[1, 4, FixWFlagsB2];
	L1Disp, GOTO[RWTrapB2],	c2, at[2, 4, FixWFlagsB2];
	L1Disp, GOTO[RWTrapB2],	c2, at[3, 4, FixWFlagsB2];

ReWriteB2:
	Xbus ← 1, XDisp, RET[WMapFixCallerB2],	c3;

RWTrapB2:
	DISP4[TrapFixesB2],	c3;

	GOTO[TrapFixesDoneB2c2],	c1, at[L1.NoFixesB2, 10, TrapFixesB2];

	TOS ← uTOS,	c1, at[L1.RestoreTosB2, 10, TrapFixesB2];
	TOSH ← uTOSH, GOTO[TrapFixesDoneB2c3],	c2;

{	GOTO[DLFix],	c1, at[L1.DLFixesB2, 10, TrapFixesB2];}
{	GOTO[FFTFix],	c1, at[L1.FFTFixesB2, 10, TrapFixesB2];}

ufnZ3:
	,	c3;
ufnZ1:
	,	c1;
ufnZ2:
	TOS ← uTOS,	c2;
	TOSH ← uTOSH, GOTO[ufnX1],	c3;

ufnX2:
	,	c2;
ufnX3:
	,	c3;

ufnX1:
	Bank ← EmuBank,	c1;
	,	c2;
	S ← S + 1, CROSS[ufnB1],	c3;

OpTable:
	Bank ← EmuBank,	c1, at[OpcodeBase];
	,	c2;
	CROSS[OpcodeBase],	c3;

SaveAllRegsB2:
	,	c*;
SaveAllRegsSh:
	uTOS ← TOS,	c*;
	uTOSH ← TOSH,	c*;

SaveSomeRegsB2:
	uS ← S,	c*;{c1}
	uPVx ← PV, L1Disp,	c*;{c2}
	uPC ← PC, DISP4[SaveRegsB2Ret]	c*;{c3}

RestoreAllRegsAndExitB2:
	TOS ← uTOS, L1 ← L1.RestoreAndExit,	c2;
	TOSH ← uTOSH, GOTO[RestoreSomeRegsB2],	c3;

RestoreAllRegsAndPFB2:
	TOS ← uTOS, L1 ← L1.RestoreAndPF,	c2;
	TOSH ← uTOSH, GOTO[RestoreSomeRegsB2],	c3;

RestoreAllRegsB2:
	TOS ← uTOS,	c*;{c2}
RestoreMostRegsB2:
	TOSH ← uTOSH,	c*;{c3}
RestoreSomeRegsB2:
	rhS ← nRhS,	c*;{c1}
	rhPV ← nRhS,	c*;{c2}
	PV ← uPVx,	c*;{c3}
	S ←uS,	c*;{c1}
	{fix stack depth}
	S ← S - Q, L1Disp,	c*;{c2}
	PC ← uPC, DISP4[RestoreRegsB2Ret],	c*;{c3}

	Bank ← EmuBank,	c1, at[L1.RestoreAndExit, 10, RestoreRegsB2Ret];
	PC ← PC + 1, L2 ← L2.0, IBDisp,	c2;
	L2 ← L2.0, DISPNI[OpTable],	c3;

TrapFixesDoneB2c2:
	,	c2;
TrapFixesDoneB2c3:
	,	c3;

B2CrossToPFaultc1:
	Bank ← EmuBank,	c1, at[L1.RestoreAndPF, 10, RestoreRegsB2Ret];
	L1 ← L1.NoFixes,	c2;
	CROSS[PFaultB1],	c3;

	{ E N D }