{File name dlspecific.mc
Description: DandeLion InterLisp Emulator
Author: Purcell // Charnley
Last mod on 28-Aug-85 11:46:34
}
ErrLoop:
Xbus ← Rx LRot0, XwdDisp, c2;
Xbus ← MStatus, XLDisp, DISP2[CSParErr], c3;
CSParErr: {MP9001}
Q ← 0+1, KCtl ← 0, CANCELBR[sink2, 3], c1, at[0,4,CSParErr];
{LMemErr: Noop, BRANCH[VirtAddrErr, EmuMemErr, 1], c1, at[1,4,CSParErr];moved to InitLisp}
{*************************
SWAP
**************************}
SWAP: MAR ← [rhS, S - 1], c1, opcode[375'b];{FD}
PC ← PC + PC16, MDR ← TOSH, CANCELBR[$, 2], WriteOK, c2;
TOSH ← MD, c3;
MAR ← [rhS, S + 0], c1;
MDR ← TOS, IBDisp, L2 ← L2.0, GOTO[DNI.TOSg], c2;
MPWait:
rhRx ← Rx ← uIOPage, c3;
MAR ← [rhRx, IOPage.MP+0], c1;
MDR ← Q, c2;
TT{saveMP} ← MD, c3;
MAR ← [rhRx, IOPage.key+0], GOTO[MPWait7], c1;
{"stop" key hard reset is 0 in bit 15}
{"undo" key down is 0 in bit 13}
raidLp1: MAR ← [rhRx, IOPage.key+0], DISP4[raidEnd, 0A] c1;
MPWait7:
uLispOptions ← 0, c2, at[0F, 10, raidEnd];
Xbus ← MD, XDisp, GOTO[raidLp1], c3;
Q ← 1, c2, at[0E, 10, raidEnd];
uWDC ← Q, L2←0, c3;
MAR ← [rhRx, IOPage.MP+0], CANCELBR[$, 0F], c1;
MDR ← TT{saveMP}, c2;
Rx ← {TeleRaidFXP}30'b, GOTO[PUNT], c3;
stopEnd:
, c3;
MAR ← [rhRx, IOPage.MP+0], c1;
MDR ← TT{saveMP}, c2;
GOTO[Reset], c3;
@RCLK: opcode[167'b],
uTOSH ← TOSH, c1;
rhTT ← TOSH LRot0, c2;
, c3;
Map ← TT ← [rhTT, TOS], L0 ← L0.RedoClk, c1;
PC ← PC + PC16, L1 ← L1.DecOnly, c2;
Rx ← rhRx ← MD, XwdDisp{XDirtyDisp}, c3;
at[L0.RedoClk,10,WMapFixCaller],
Q ← uClockHigh, DISP2[ClkMap], c1;
TOSH ← RShift1 uClockBits, SE←0, c2, at[1, 4, ClkMap];
TT ← uClockLow, c3;
MAR ← [rhRx, TOS+1], L2 ← L2.0, c1;
MDR ← TOSH +TT, CANCELBR[$, 2], WriteOK, c2;
Ybus ← TOSH +TT, CarryBr, c3;
MAR ← [rhRx, TOS+0], BRANCH[ClkNoCar, ClkCar], c1;
ClkNoCar: MDR ← Q, IBDisp, GOTO[reTosh], c2;
ClkCar: MDR ← Q+1, IBDisp, GOTO[reTosh], c2;
reTosh: TOSH ← uTOSH, L2 ← L2.0, DISPNI[OpTable], c3;
CALL[WLMapFix]{will return at RedoClk}, c2, at[0, 4, ClkMap];
CALL[WLMapFix]{will return at RedoClk}, c2, at[2, 4, ClkMap];
CALL[WLMapFix]{will return at RedoClk}, c2, at[3, 4, ClkMap];
{*************************
Interrupt Processing
**************************}
MInt0: at[600],
TT ← 0{buffer empty}, Xbus ← uPCCrossL, XRefBr, GOTO[MInt], c1;
MInt1: at[700],
TT ← TT xor ~TT{not empty}, Xbus ← uPCCrossL, XRefBr, GOTO[MInt], c1;
MInt: Ybus ← uWDC, NZeroBr, BRANCH[$, Crossing], c2;
TT ← uWP, ClrIntErr, BRANCH[Interuption, IgnoreInt], c3;
IgnoreInt: Noop, c1;
IBDispOnlyL: IBDisp, L2 ← L2.0, GOTO[DISPNIonly], c2;
DISPNIonly: L2 ← L2.0, DISPNI[OpTable], c3;
Interuption: Ybus ← TT, ZeroBr, c1;
BRANCH[Wakeups, NoWakeups], c2;
NoWakeups: GOTO[IgnoreInt], c3;
Wakeups: uWP ← 0, c3;
Rx ← 1, c1;
uWDC ← Rx,{off interrupts} c2;
Rx ← KbdFXP, L2 ← 0{NotInCall}, GOTO[PuntFor], c3;