BusMaster Test Log
	Interlisp-D Version: Koto






	Author: Stephen Purcell
	Date: 16-Oct-85
      

 

	Xerox
	Artificial Intelligence Systems


 
1.0   Log: (dribble file)
[Eris]<LispCore>Busmaster>
  BUSMASTER.TESTLOG!2          3376 13-Oct-85 13:04:43
  
NIL
6_(PUSH DIRECTORIES '{ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2]
(DIRECTORIES reset)
({ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2 {ERIS}<LISP>KOTO>LIBRARY> 
{ERIS}<LISP>KOTO>LISPUSERS> {ERIS}<LISPUSERS> {ERIS}<LISP>KOTO>SOURCES> 
{PHYLUM}<LISP>KOTO>LIBRARY> {PHYLUM}<LISP>KOTO>LISPUSERS> {PHYLUM}<LISPUSERS> 
{PHYLUM}<LISP>KOTO>SOURCES>)
7_FILESLOAD[BUSMASTER]

{ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>BUSMASTER.DCOM;1
compiled on 28-Sep-85 17:38:51
FILE CREATED 16-Sep-85 14:43:58
BUSMASTERCOMS

{ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>BUSEXTENDER.DCOM;1
compiled on 28-Sep-85 17:35:49
FILE CREATED 19-Aug-85 11:14:06
BUSEXTENDERCOMS
({ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>BUSMASTER.DCOM;1)
8_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback OK
16-bit data loopback OK
DMA loopback OK
Receiver data register loopback OK
Receiver address registers loopback OK
Memory there OK - page numbers 1
T
9_(FILESLOAD PCMEMTEST)

{ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>PCMEMTEST.DCOM;4
compiled on 29-Sep-85 18:50:11
FILE CREATED 29-Sep-85 18:11:53
PCMEMTESTCOMS
({ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>PCMEMTEST.DCOM;4)
10_(PCMEM.CHECKOUT)
There is memory on the PC at page address(es) 1.
Memory refresh DMA OK
Running in ELT in QuietTestBltIn in PCMEM.CHECKOUT
.....+
11_(PCMEM.MAKETEST]

UNDEFINED FUNCTION
MakeTogMenu

(MakeTogMenu broken)
12:(FILESLOAD PCMEMTEST TOGMENU)

{ERIS}<LISP>KOTO>LISPUSERS>TOGMENU.DCOM;1
compiled on 12-Apr-85 17:14:11
FILE CREATED 12-Apr-85 17:13:45
TOGMENUCOMS
({ERIS}<LISP>KOTO>LISPUSERS>TOGMENU.DCOM;1)
13:OK
MakeTogMenu
{WINDOW}#74,30404
14_
14_
14_
14_(PC.CHECKOUT)
Status loopback failure: test:0 a16:0 a8:0 a0:0 in,
                         test:1 a16:0 a8:1 a0:0 out.
There is some indication that the failure indicated above results from the 
fact that either the busmaster is powered down, or there isn't anything 
connected to the parallel I/O port where the busmaster should be - please 
check that the busmaster is indeed cabled up to the bottom socket on the CPE 
(3) board of the Dandetiger and that it has power.
NIL
15_(* cable was removed above and restored now)
cable
16_(* Expansion power switched off)
Expansion
17_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
18_(* Expansion power switched on)
Expansion
19_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
20_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
21_(BUS.RESET)
81
22_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
23_(* secure cables)
secure
24_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
25_(* board reset button)
board
26_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
27_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
28_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
29_FILESLOAD[PCDAC]

{ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>PCDAC.DCOM;1
compiled on 28-Sep-85 17:51:24
FILE CREATED 18-Sep-85 11:06:25
PCDACCOMS
({ERIS}<LISPCORE>BUSMASTER>KOTO>TEST2>PCDAC.DCOM;1)
30_LOGIN]
Login:  Login:  PURCELL (password)   (password)  
PURCELL
31_(PC.CHECKOUT]
Status loopback OK
8-bit data loopback failure: 40 in,
                              0 out.
NIL
32_PCDAC.CHECKOUT]

UNDEFINED FUNCTION
PCDAC.CHECKOUT

33_PCDAC.MAKETEST]
{WINDOW}#65,160404
34_(* set Sample Rate: 10K)
set
35_(* set Display Every: AFAP)
set
36_(* middle button in PC D/A-A/D Test Window: SCOPE)
middle
37_(PC.CHECKOUT)
Status loopback OK
8-bit data loopback OK
16-bit data loopback OK
DMA loopback OK
Receiver data register loopback OK
Receiver address registers loopback OK
Memory there OK - page numbers 1
T
38_(* live oscilliscope is verified to work)
live
39_(* STOP key)
STOP
40_(DRIBBLE)