{Eris}<Purcell>Memo>BusMaster.plan
DANDELION BUSMASTER INTERNAL PROJECT NOTEBOOK
TABLE OF CONTENTS
Who's Who of BusMaster
PRODUCT MANAGEMENT
Goals
Marketing Objectives
Engineering Response
PRODUCT DEVELOPMENT ENGINEERING
Hardware
CPE (Central Processor Expanded) Optional Processor Card
BusExtension Port Schematic
BusExtension Port Timing
Logic Analyzer connector
Optional Rework
BusMaster Card
Schematic
Priciples of Operation
Part list
Assembly Instructions and Rev levels
PC Expansion Unit Interface
Receiver Card Schematic
PC Memory Expansion Schematic
Multibus Signals
UFO Color Card Schematic
Conrac 7211 Color Display Manual
Firmware
DandeTigerManual microcode and architecture
Interlisp-D
Cedar
Mesa
Software (Interlisp-D)
BusExtender
BusMaster
TestBus
TestBlt
DandelionUFO Color Card
PCDAC
RTSD Real Time Speech Demo
PRODUCT SUPPORT
Customer Documentation
BusExtender
BusMaster
TestBus, TestBlt
PCDAC
DandelionUFO
Hardwar/Software Check List and Installation Instructions
BusMaster-PC
BusMaster-Multibus
BusMaster-Diagnostics
Color
Speech
Customer List
Internal
Parc
Venture
Inventory
Vendors
Service
Product Engineering SPG/ED
FCC Testing
UL Cirtification
Engineering change control
MARKETING
Sales Literature
Product Literature
Presentation Slides
Sales Manual
Selling guide
Price and Availability
Demonstrations
Speech Demo Script
Trade Shows
Customer Presentations
Interest List
Forcasts
People Directory
David Kearns
Bill Glavin
Bob Adams, Xerox Systems Group (XSG), ES
Arnold Miller, manager Electronics Division (ED), ES
Lou Karagianis, manager, Special Information Systems (XSIS), PASA
Gary Moskovitz, general manager AI Systems Business Unit (AISBU)
Gary Moskovitz, acting manager Product Management
Mike Fisher, hardware product manager, PA
Beau Sheil, manager Product Development, PA
Steve Purcell, manager System Architecture Area
Mike Herring, Lisp programmer: BusExtender, BusMaster, PCDac
Herb Jellinek, Lisp programmer: DandelionUFO (pc color card), RTSD (real time speech demo)
Kelly Roach, Lisp programmer: image processing: 2-D FFT, area fill
Dennis Dunn, manager Marketing Operations PASA
Bob Chesloe mgr System Support Engineers
Marcel Pahlavan, manager Product and Customer Support Operations PASA
Tom Heron, manager BusMaster product
Norm Shuster SPG/ED liason
Clay Agadoni procurement, burn-in, shipping, inventory
John Unlap technical trouble shooter
Gordon Stith, manager Financial Administration
Bill Norton, manager field service WASH DC
Reggie Herod PASA
...
James Leung, manager Special Projects Group (SPG) Engineering, ES
Tom Henning, AISBU/SIS projects manager/Liason
Ruby Turner BusMaster project
Bob Nishimura BusMaster packaging, drawings
Gary Porter, manager SPG Manufacturing, ES
...
Bill Spencer, manager PARC
John Seeley Brown, manager PARC Intelligent Systems Lab
Kris Halvorsen lisp speech researcher
Bob Richie, manager PARC Computer Science Lab
Jim Gasbarro researcher: Cedar BusMaster, IEEE-488 Instrument Bus
East Rochester Research Ctr
Don Tripp, Circuit designer BusMaster, prototye production manager
UFO Systems Inc
Ken Henderson
(Don Tripp, consultant)
Microlytics Inc
Mike Weiner, pres
Chuck engineer, Multibus Scanner interface
University of Edinborough
Henry Thompson, BusMaster alpha tester
PRODUCT MANAGEMENT
Goals
The Xerox 1100 Series product needs an industry standard bus for customer initiated hardware expansion. All three AI workstations of the 1100 family have Xerox proprietary busses which unnaturally raise the cost of adding new hardware features. A common sales "knock-off" is our lack of some significant or insignificant peripheral: e.g. color displays, IEEE-488 intrument bus, touch panel, graphics tablet, telephone interface, scanner, etc. Our answer has been limited to interfacing through RS232 or Ethernet; these approaches are a mismatch for many medium to high performance peripherals. Designing a new hardware interface typically costs $200,000 to $500,000. Thousands of peripherals are available "off the shelf" for industry standard busses with prices between $500 and $5000. All of our competition support some industry standard bus which gives them a competetive edge even for customers with no immediate need for new peripherals.
Engineering Response
Product Development proposes the 1108X "BusMaster" option to meet the customer need for hardware expansion and configurability. BusMaster allows the 1108X Workstation to drive an industry standard bus in an expansion chassis outside the 1108 enclosure. Two busses are to be initially supported: PC-bus and Multibus.
PRODUCT DEVELOPMENT ENGINEERING
Hardware
CPE BusExtension Port Schematic
The following is the TIMING TABLE for DLion BX (Bus eXtension) port.
Min Max Name Parameter
---- --- ---- -------
137 ns tCY min BxClk period
39 ns tCH min BxClk high
98 ns tCL min BxClk low
36 ns tS min BxData output Setup time before (active falling) clock edge.
0 ns tH min BxData and BxAddr output Hold time after clock edge.
90 ns tDO max BxData Valid after previous clock edge.
10 ns tVO BxData Valid after clock edge
25 ns tAddr min BxAddr Setup time before clock high (inactive edge)
Here are the times by card and by bus. Some cards have some margin beyond the bus times.
Name CPE SAM MPB DL-Bus Dove-Bus BMaster AIS Option
---- ---- --- --- ------ -------- ------- ----------
tCY 137 160 125 137 125 <125 <125
tCH 39 ?? 31 40 40 20 40
tCL 98 ?? 94 40 40 20 40
tS 36 43? 43? 36 43 28 43
tDO 92 90? 80? 90 80 83 80
tAddr >25 25 25 25 25 25 25
Timing Calculations:
91 "A LRotn" path to Xbus
8 LS245 data in to data out
-137 clock period
---- ---------
36 tS CPE
35 WTL 1032 Setup
---- ---------
35 tS CPE
40 LS74 clk to output
5 gate
30 LS244 en to output or 25ns LS373 en to data out
8 LS245 data in to data out
---- ---------
83 tDO BM
45 Xbus in to MDR
-137 clock period
---- --------
92 tDO CPE
15 LS374 min clk
17 LS273 min clk
40 WTL1032 min clk
---- -------
40 tCH BM
8 LS245 Data to data
20 LS273 or LS374 Setup
---- --------
28 tS BM
5 LS240
5 LS20
12 LS138
-- -------
22 tAddr BM
CPE Logic Analyzer connector
CPE rework
BusMaster Card
Part list
Schematic
Assembly Instructions
Priciples of Operation
Expansion Unit
Firmware
Interlisp-D
{File name <tajo>BusExt.mc
Description: DandeLion Interlisp Emulator Bus Extension
Author: Purcell
Created: 31-May-84 16:45:34
Purcell 6-Mar-85 14:57:37 fix bug in pcbus
charnley early feb {%L} change for intermezzo
Purcell 4-Aug-84 3:07:29 remove delay; mask adc to 12 bits
Purcell 4-Aug-84 1:02:24 add delay to pcblt
Purcell 1-Aug-84 20:48:27 forgot to "←ib" after "←ibNA"; 5 needed in pipe primed
Purcell 30-Jul-84 20:59:53 start more pipe on inputs (4) (5 needs work]
Purcell 28-Jul-84 15:56:16 check out
Purcell 28-Jul-84 11:53:43 more desk checking of block, test bit 9
Purcell 27-Jul-84 0:42:14 restart pc bus block opcode
Purcell 11-Jul-84 22:39:45 pc bus block write
Purcell 11-Jul-84 16:41:15 add pipe delay in input and move TOSH← earlier
Purcell 10-Jul-84 9:29:57 fix Y0 bug in output
Purcell 26-Jun-84 14:19:53
}
{INPUT: TOSH ← smallpl, DISP4[MiscIn], c1, at[0D,10, MiscDisp];}
{
(SETQ MBUS.OUTL (PLUS 0 (LLSH REG 4)))
(SETQ MBUS.OUTM (PLUS 11 (LLSH REG 4)))
(SETQ MBUS.INL (PLUS 9 (LLSH REG 4)))
(SETQ MBUS.INM (PLUS 10 (LLSH REG 4)))
(\DEVICE.OUTPUT DATA MBUS.OUTL)
(\DEVICE.OUTPUT DATA MBUS.OUTM)
(SETQ DATA (\DEVICE.INPUT MBUS.INL))
(SETQ DATA (\DEVICE.INPUT MBUS.INM))
(\PCBLT (alpha op) VIRTUALADDR PCADDRH PCADDRL COUNT)
L3Disp values initialized to alpha byte
1,2 bit data size: 0=word, 1=byte, 2=reversed bytes, 3=nibble
4 bit 0=output, 1=input
8 bit extra states
0 read/output word
1,9 read/output bytes
2,A read/output bytes reversed
3,7,B,F read/output nibbles
4 input/write word
5,D input/write bytes
6,E input/write bytes reversed
}
{PV} RegDef[rAddr, R, 3]; {pc bus address low 16 bits}
{TOSH} RegDef[rDataIn, R, 1];
{TT} RegDef[rDataOut, R, 2]; {rDataOut not needed during cross so alias with and use TT}
{Rx real
TOS word count remaining (end input/write at 0; end read/output at -1)(fetch from virt+TOS-1)
Q used by mapping routine
}
RegDef[uVirtL, U, 27];{TT}{uTT} {ok}
RegDef[uVirtH, U, 0C];{TOS}{ibNA} {BitBlt}{OK}
RegDef[uBusCtl, U, 2];{fZ=2} {BitBlt}{OK}
RegDef[uAddr, U, 33];{rAddr}{fZ=3} {OK}
RegDef[uDataOut, U, 12];{fZ=2} {OK}
{L0 unused
L1 Fix {L1.NoFixes}
L2 0=normal, 1=test loop
L3 phase and op}
PCBKW: FloatNop, L1 ← L1.NoFixes, c1, opcode[60'b];
uPV ← PV, L2 ← 0, c2;
{ PPort ← TT xor TT, c3;}
Rx ← 0FF + 1, c3;
Q ← uPPsave, c1;
PPort ← Q and ~Rx, c2;
, c3;
pcA1: MAR ← [rhS, S+0], c1;
S ← S - 2, c2;
rAddr{L} ← MD, FloatNop, c3;
pcA2: MAR ← [rhS, S+0], c1;
S ← S - 2, c2;
FLTimes.WA.WB{% fZ=3}, Float.M, Xbus{mBusAddrM} ← MD, c3;
pcA3: MAR ← [rhS, S+0], c1;
S ← S - 1, c2;
uTOS ← TOS, TT ← MD{virtL}, c3;
{TT=rDataOut=virtL}
pcA4: Rx{2*TOS} ← TOS LShift1, Xbus ← ibNA, XDisp, c1;
rDataIn{4*TOS} ← Rx LShift1, DISP4[pcAdd, 0C], c2;
rAddr ← rAddr + TOS, GOTO[pcArg], c3, at[0C, 10, pcAdd];{word addressing}
rAddr ← rAddr + Rx{2*TOS}, GOTO[pcArg], c3, at[0D, 10, pcAdd];{byte addressing}
rAddr ← rAddr + Rx{2*TOS}, GOTO[pcArg], c3, at[0E, 10, pcAdd];{byte reversed}
rAddr ← rAddr + rDataIn{4*TOS}, GOTO[pcArg], c3, at[0F, 10, pcAdd];{nibble addressing}
pcArg: MAR ← [rhS, S+0], c1;
S ← S + 5, c2;
uVirtL ← TT, TT ← MD{virtH}, c3;
rAddr ← rAddr -1, c1;
uAddr ← rAddr, Rx ← 0{force remap}, c2;
uVirtH ← TT, Xbus ← ibNA, XDisp, c3;
pcBCtl: TOSH ← 0{uBusCtl}, Float.L, Xbus{mBusAddrL} ← uAddr, BRANCH[pcBOut, pcBIn, 0B], c1;
pcBIn: TOSH ← TOSH or 1, GOTO[pcCtlj], c2; {set mBusCtl for reads}
pcBOut: TOSH ← TOSH or 2, GOTO[pcCtlj], c2; {set mBusCtl for writes}
pcCtlj: uBusCtl ← TOSH, c3;
Xbus ← ib, XDisp, c1;
Float.M, Xbus{mBusCtl} ← uBusCtl, L3 ← 0, DISP4[pcBlk], c2;
{pcRead subroutine; return to pcReadRet+L3, use uAddr, update uAddr, read virt+TOS-1}
pcRead: MAR ← Rx ← [rhRx, Rx-1], c1;
pcRead2: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, L3Disp, BRANCH[$, pcRcr, 1], c2;
uAddr ← rAddr, rDataOut ← MD, RET[pcReadRet], c3;
{pcBus subroutine: return to pcBusRet+L3, used both for input and output; rDataIn ignored on output}
pcBus2: Noop, c2;
pcBus3: uAddr ← rAddr, c3;
uDataOut ← rDataOut, c1;{% good for 5; ok others ?}
Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, c2;
pcBus: Noop, c3;
Noop, c1;
Noop, c2;
Ybus ← rDataIn, Xbus ← PPort, XwdDisp{9(,10)}, c3;
pcBus1: Q ← rDataIn or FloatResult, L3Disp, BRANCH[$, pcWait, 1], c1;
rDataIn ← Q, Float.L, Xbus{mBusOData} ← uDataOut, RET[pcBusRet], c2;
pcWait: Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, CANCELBR[pcBus, 0F], c2;
{0: Block Read/Output Words}{uAddr=rAddr=last, TOS=cnt}
CALL[pcRead], c3, at[0, 10, pcBlk];
{pcRead: MAR ← Rx ← [rhRx, Rx-1], c1;
pcRead2: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, L3Disp, BRANCH[$, pcRcr, 1], c2;
uAddr ← rAddr, rDataOut ← MD, RET[pcReadRet], c3;
}
pcOW: TOS ← TOS -1, CarryBr, c1, at[0, 10, pcReadRet];
uDataOut ← rDataOut, BRANCH[pcDn, pcBus, 0E], c2;
{pcBus: Q ← PPort, XwdDisp{9,10}, c3;
pcBus1: rDataIn ← rDataIn or FloatResult, L3Disp, BRANCH[$, pcWait, 1], c1;
Float.L, Xbus{mBusOData} ← uDataOut, RET[pcBusRet], c2;
}
Noop, CALL[pcRead], c3, at[0, 10, pcBusRet], c3;
{1: Block Read/Output Bytes}
CALL[pcRead], c3, at[1, 10, pcBlk];
{pcRead: MAR ← Rx ← [rhRx, Rx-1], c1;
pcRead2: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, L3Disp, BRANCH[$, pcRcr, 1], c2;
uAddr ← rAddr, rDataOut ← MD, RET[pcReadRet], c3;}
pcOB: TOS ← TOS -1, CarryBr, L3 ← 9, c1, at[1, 10, pcReadRet];
uDataOut ← rDataOut, BRANCH[pcDn, pcBus, 0E], c2;
rDataOut ← rDataOut LRot8, L3 ← 1, c3, at[9, 10, pcBusRet];
pcOBB: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, GOTO[pcBus2], c1;
Noop, CALL[pcRead], c3, at[1, 10, pcBusRet], c3;
{3: Block Read/Output Nibbles}
CALL[pcRead], c3, at[3, 10, pcBlk];
{pcRead: MAR ← Rx ← [rhRx, Rx-1], c1;
pcRead2: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, L3Disp, BRANCH[$, pcRcr, 1], c2;
uAddr ← rAddr, rDataOut ← MD, RET[pcReadRet], c3;}
pcON: TOS ← TOS -1, CarryBr, L3 ← 7, c1, at[3, 10, pcReadRet];
uDataOut ← rDataOut, BRANCH[pcDn, pcBus, 0E], c2;
rDataOut ← rDataOut LRot12, L3 ← 0B, c3, at[7, 10, pcBusRet];
pcONN: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, GOTO[pcBus2], c1;
rDataOut ← rDataOut LRot12, L3 ← 0F, c3, at[0B, 10, pcBusRet];
pcONNN: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, GOTO[pcBus2], c1;
rDataOut ← rDataOut LRot12, L3 ← 3, c3, at[0F, 10, pcBusRet];
pcONNNN: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, GOTO[pcBus2], c1;
Noop, CALL[pcRead], c3, at[3, 10, pcBusRet], c3;
{4: Block Input/Write Words}
rAddr ← rAddr -1, c3, at[4, 10, pcBlk];
pcInPipeStart: uAddr ← rAddr, c1;
Float.L, Xbus{mBusOData} ← uDataOut, c2;
Float.L, Xbus{mBusAddrL} ← uAddr, c3;
rAddr ← rAddr -1, Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, c1;
uAddr ← rAddr, rDataIn ← 0, GOTO[pcBus], c2;
pcIW: TOS ← TOS -1, NZeroBr, c1, at[4, 10, pcWriteRet];
uAddr ← rAddr, rDataIn ← 0, BRANCH[pcDn, pcBus, 0E], c2;
{pcBus: Xbus ← PPort, XwdDisp{9,10}, c*;
rDataIn ← rDataIn or FloatResult, L3Disp, BRANCH[$, pcWait, 1], c*;
Float.L, Xbus{mBusOData} ← uDataOut, RET[pcBusRet], c*;
}
rDataIn ← rDataIn, CALL[pcWrite], c3, at[4, 10, pcBusRet];
pcWrite: MAR ← Rx ← [rhRx, Rx-1], c1;
pcWrite2: MDR ← rDataIn, Float.L, Xbus{mBusAddrL} ← uAddr, L3Disp, BRANCH[$, pcWcr, 1], c2;
rAddr ← rAddr -1, Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, RET[pcWriteRet], c3;
{5: Block Input/Write Bytes}
rAddr ← rAddr -1, GOTO[pcInPipeStart], c3, at[5, 10, pcBlk];
{ uAddr ← rAddr, c1;
Float.L, Xbus{mBusOData} ← uDataOut, c2;
Float.L, Xbus{mBusAddrL} ← uAddr, c3;
rAddr ← rAddr -1, Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, c1;
uAddr ← rAddr, rDataIn ← 0, GOTO[pcBus], c2;}
{{ Float.L, Xbus{mBusOData} ← uDataOut, c3, at[5, 10, pcBlk];
rAddr ← rAddr -1, Xbus ← FloatResult{mBusIData}, FLFloatA{fZ=2}, Float.L, c1;
uAddr ← rAddr, rDataIn ← 0, GOTO[pcBus], c2;}}
pcIB: TOS ← TOS -1, NZeroBr, L3 ← 5, c1, at[0D, 10, pcWriteRet];
uAddr ← rAddr, rDataIn ← 0, BRANCH[pcDn, pcBus, 0E], c2;
rDataIn ← rDataIn and 0F, L3 ← 0D, c3, at[5, 10, pcBusRet];
pcIBB: rAddr ← rAddr -1, Float.L, Xbus{mBusAddrL} ← uAddr, c1;
rDataIn ← rDataIn LRot8, GOTO[pcBus3], c2;
{pcBus2: uAddr ← rAddr, c2;
uDataOut ← rDataOut, c3;
Xbus ← PPort, XwdDisp{9(,10)}, c3;
pcBus1: rDataIn ← rDataIn or FloatResult, L3Disp, BRANCH[$, pcWait, 1], c1;
Float.L, Xbus{mBusOData} ← uDataOut, RET[pcBusRet], c2;
}
{BX debug 3-Mar-85 16:56:43
rDataIn ← rDataIn {and uF000}, CALL[pcWrite], c3, at[0D, 10, pcBusRet];
}
Xbus ← rDataIn LRot0, XLDisp, c3, at[0D, 10, pcBusRet];
Ybus ← rDataIn, NZeroBr, BRANCH[bxE, bxO, 2], c1;
bxE: Noop, BRANCH[bxZ, bxNZ], c2;
bxO: Noop, BRANCH[bxZ, bxNZ], c2;
bxZ: CALL[pcWrite], c3;
bxNZ: CALL[pcWrite], c3;
{Remap to Virt+TOS-1}{don't fault if TOS=0}
pcWcr: Noop, CANCELBR[pcCr, 0F], c3;
pcRcr: rAddr ← rAddr +1, CANCELBR[pcCr, 0F], c3;
pcCr: TOS ← TOS -1, CarryBr, c1;
TT ← uVirtL, BRANCH[pcCz, pcCnz], c2;
pcCz: rhTT ← uVirtH, GOTO[pcMp], c3;
pcCnz: TT ← TT + TOS, CarryBr, rhTT ← uVirtH, GOTO[pcMp], c3;
pcInc: Q ← rhTT+1, LOOPHOLE[byteTiming], c2;
rhTT ← Q LRot0, c3;
pcMp: Map ← Q ← [rhTT, TT], BRANCH[pcMp2, pcInc], c1;
pcMp2: TOS ← TOS + 1, c2;
Rx ← rhRx ← MD, XwdDisp, c3;
Map ← Q ← [rhTT, TT], BRANCH[$, pcFault, 1], c1;
MDR ← Rx or 30, c2;
L3Disp, c3;
pcMpD: MAR ← Rx ← [rhRx, TT+0], BRANCH[pcRead2, pcWrite2, 0B], c1;
{% fix ups}
pcFault: TOSH ← smallpl, c2;
Q ← uPPsave, c3;
PPort ← Q, c1;
PV ← uPV, GOTO[RWTrap], c2;
pcDn: S ← S - 6, L2Disp, c3;
TOSH ← smallpl, BRANCH[$, pcRep], c1;
, c2;
pcAlmost:
Rx ← uPPsave, c3;
pcEnd:
PPort ← Rx, L2 ← L2.0, c1;
PV ← uPV, IBDisp, c2;
PC ← PC + 1, L2 ← L2.0, DISPNI[OpTable], c3;
pcRep: S ← S + 6, c2;
TOS ← uTOS, GOTO[pcA1], c3;
BusX: FloatNop{free BX in 2 BX cycles}, c2, at[09,10,MiscIn];{read L}
TOS ← TOS LRot12, {FloatUMS,} c3;
Ybus ← TOS, AltUaddr, c1;
FloatULP, TOS ← FloatResult, c2;
pcInDn: TOS ← FloatResult, c3;
GOTO[IB.nop], c1;
FloatNop{free BX in 2 BX cycles}, c2, at[0A,10,MiscIn];{read M}
TOS ← TOS LRot12, {FloatUMS,} c3;
Ybus ← TOS, AltUaddr, c1;
FloatUMP, TOS ← FloatResult, GOTO[pcInDn], c2;
{TT ← MD,} c3, at[0,10,MiscOut];{Write L}
{%L FloatNop{free BX in 2 BX cycles}, c1;
TOS ← TOS LRot12, FloatUMS, c2;
rhRx ← nRhS, Rx ← S + 2, c3;
%L}
FloatNop{free BX in 2 BX cycles}, Rx ← S - 0 - 1, c1;
TOS ← TOS LRot12, FloatUMS, c2;
rhRx ← nRhS, Rx ← Rx + 3, c3;
MAR ← Rx ← [rhRx, Rx + 0], c1;
Ybus ← TOS, AltUaddr, L2 ← L2.0, IBDisp, c2;
FloatULP, Xbus ← MD { ← FloatResult}, L2 ← L2.0, DISPNI[OpTable], c3;
{TT ← MD,} c3, at[0B,10,MiscOut];{Write M}
{%L FloatNop{free BX in 2 BX cycles}, c1;
TOS ← TOS LRot12, FloatUMS, c2;
rhRx ← nRhS, Rx ← S + 2, c3;
%L}
FloatNop{free BX in 2 BX cycles}, Rx ← S - 0 - 1, c1;
TOS ← TOS LRot12, FloatUMS, c2;
rhRx ← nRhS, Rx ← Rx + 3, c3;
MAR ← Rx ← [rhRx, Rx + 0], c1;
Ybus ← TOS, AltUaddr, L2 ← L2.0, IBDisp, c2;
FloatUMP, Xbus ← MD, L2 ← L2.0, DISPNI[OpTable], c3;
{ E N D }
Cedar
Mesa
Software (Interlisp-D)
BusExtender
BusMaster
BusMasterTest
DandelionUFO Color Card
MARKETING
Sales Literature
Product Literature
Presentation Slides
Sales Manual
Selling guide
Customers don't think they need BusMaster; they just need hardware features that we don't manufacture. Many requests for new hardware can be met by third party products interfaced to the 1108X through BusMaster. System Support Engineers should be able to qualify and provide first level of response to customer requests for new devices. Customers should be prepared to write Lisp software drivers for new devices or rely on LispUser contributed software.
Price and Availability
Suggested Sale Price is $2500. BusMaster Card w/ribbon cable
Demonstrations
Trade Shows
AAAI Austin Texas, August 1984
ACM San Francisco, Sept 1984
IJCAI Los Angeles, August 1985
Customer Presentations
ESL
Hughes (which led to sale)
Harvard U
Fluke
U Hawaii
AI Ltd
University of Edinbourgh (crucial to sale)
CSLI Stanford University
CCRMA Stanford University
Statistics Dept Stanford University
MIT Sloan
EDS/General Motors
Forecasts
Preliminary sales forecast is 30-55 units in 1985
PRODUCT SUPPORT
Customer Documentation
BUSMASTER-PC
HARDWARE CHECK LIST
1108X Dandelion with CPE Expanded Processor Option
BusMaster card (7 x 12 inches) mounted in Dandelion bottom tray.
BusMaster Power wires (black and red 3 feet which connect to Bus Master card)
BusMaster Ribbon cable (37 pin D female connector to CPE and 37 pin D female(or male) to BusMaster)
IBM Expansion Unit (looks like a PC but no processor or keyboard)
IBM Expansion Unit Receiver card.
IBM Cable for Expansion Unit (62 pin connectors on 3 ft x 1/2 in cable)
PC peripheral cards as needed (see Application Installation Instructions below)
Tools required are screwdriver and wrench or hex nut drivers.
BUSMASTER-PC
HARDWARE INSTALLATION INSTRUCTIONS
Tools required are screwdriver and wrench or hex nut drivers.
The BusMaster is mounted on the bottom of the Xerox 1108. The BusMaster card is shipped attached to a replacement bottom tray ("Oil Pan") which replaces the original one as follows:
For IBM-PC operation, install only jumpers: E1, E4, E7, E9 (See page 7 of BusMaster Schematics)
Exit from running software. eg use (LOGOUT) to exit Interlisp.
Power off Dandelion (Xerox 1108) and Expansion Unit
Remove front and right side covers of Dandelion.
Install or verify presence of CPE Processor Option in front slot 3.
Locate power supply at rear (side) of Dandelion
+5V RED: Connect Red BusMaster power wire to +5V screw
Loosen lower screw terminal labeled +5V (with orange wires)
Wrap Red power wire terminal lug around +5V screw.
Tighten +5V screw to Red (and orange) wires.
5V RTN BLACK: Connect Black BusMaster power wire to 5V RTN screw
Loosen upper screw terminal labeled 5V RTN (with purple wires)
Wrap Black power wire terminal lug around 5V RTN screw.
Tighten 5V RTN screw to Black (and purple) wires.
Red and Black BusMaster power wires are connected to BusMaster card.
Red to connector J6 pins 4,5,6
Black to connector J6 pins 1,2
Identify the BusExtender connector 3-2 (card 3 from right! connector 2 from top), which is the lower female 37-pin D-connector of CPE Expanded Processor Card in slot 3 in front of the 1108X Dandelion. Plug one end of the Ribbon cable into this connector.
Plug the other end of Ribbon cable into the 37-pin female (some engineering models use male) D-connector of the BusMaster card.
Either before or after testing complete the installation of the BusMaster card as follows:
Gently lay Dandelion on its left side.
Remove the original "Oil Pan" by loosening 4 screws and replace it with the new BusMaster "Oil Pan".
The "Oil Pan" can be mounted with the external connector facing either forward or back.
Return the Dandelion to its normal upright position.
Remove cover of PC Expansion Unit
Plug in IBM Receiver card in first slot nearest power supply
Plug in each end of 62-pin IBM Cable to IBM Receiver card in expansion unit and to the BusMaster at the external connector of the Oil Pan.
Install IBM-PC peripheral cards in Expansion Unit as per IBM instructions or per Application Hardware Instructions below.
Check connections. Power on Dandelion and Expansion Unit in either order.
Use the loopback Diagnostics in Lisp to check the path to the Expansion Unit Receiver card and back.
BUSMASTER DIAGNOSTICS
SOFTWARE INSTALLATION INSTRUCTIONS
Inside [Eris]<Lisp>Intermezzo>Basics>Lisp.sysout
(FILESLOAD '{Eris}<Lisp>Intermezzo>Library>BUSEXTENDER)
(FILESLOAD '{Eris}<Lisp>Intermezzo>Library>BUSMASTER)
(FILESLOAD '{Eris}<LispUsers>TOGMENU)
(FILESLOAD '{Eris}<LispUsers>TRUEHAX)
(FILESLOAD '{Ivy}<HThompson>Lisp>DSL>BUSUTIL)
(FILESLOAD '{Ivy}<HThompson>Lisp>DSL>TESTBUS)
(FILESLOAD '{Ivy}<HThompson>Lisp>DSL>TESTBLT)
or load BusMaster Floppy
CONN {FLOPPY}
FILESLOAD[BUSEXTENDER BUSMASTER TOGMENU TRUEHAX BUSUTIL TESTBUS TESTBLT)
(MakeBusBox)
(MakeBusmasterTest)
BUSMASTER-MULTIBUS
HARDWARE CHECK LIST
1108X Dandelion with CPE Expanded Processor Option
BusMaster card (7 x 12 inches) removed from Dandelion bottom tray.
BusMaster Ribbon cable (37 pin D female connector to CPE and 37 pin D male/female to BusMaster)
Multibus Card Cage with power supply (BusMaster requires 3 Amps of 5 volts.)
Multibus peripheral cards as needed (see Application Installation Instructions below)
Tools required are screwdriver.
BUSMASTER-MULTIBUS
HARDWARE INSTALLATION INSTRUCTIONS
Exit from running software. eg use (LOGOUT) to exit Interlisp.
Power off Dandelion (Xerox 1108) and Expansion Unit
Remove front cover of Dandelion.
Install or verify presence of CPE Processor Option in front slot 3.
Identify the BusExtender connector 3-2 (card 3 from right! connector 2 from top), which is the lower female 37-pin D-connector of CPE Expanded Processor Card in slot 3 in front of the 1108X Dandelion. Plug one end of the Ribbon cable into this connector.
Remove the BusMaster card from metel mesh tray if it is so mounted. Discard or return tray.
Prepare Multibus card cage with Power supply.
For single BusMaster card MultiBus operation, install jumpers: E1, E4, E5, E7, E9, E17 (See page 7 of BusMaster Schematics)
If BClk is to be provided by the BusMaster card install jumper E15.
If BClk is provided by the backplane or another card remove jumper E15.
Insert BusMaster card into any card slot.
Plug other end of the Ribbon cable into the 37-pin BusMaster connector.
Install other peripheral cards in the Multibus cage.
Check connections. Power on Dandelion and Multibus Card Cage in either order.
Use the loopback Diagnostics in Lisp to check the path to and from the BusMaster.
UFO COLOR DEMO
HARDWARE CHECK LIST
1108X DandeTiger with BusMaster-PC (See Check List and Installation Instructions above)
UFO Color Board, Part# 0017991, IBM-PC/XT, Hi Res. Color Board, 640x400, non- interlaced
3 phono pin to BNC adapters
3 medium BNC jumper cables
1 short BNC jumper cable
Conrac model 7211 Color Monitor
UFO COLOR DEMO
HARDWARE INSTALLATION INSTRUCTIONS
Power Off Expansion Unit
Set UFO Color Board jumpers: odd jumpers from E1 to E47.
Set UFO Color Board jumpers: E50, E53, E55, E57, E59
Check UFO Color Board for 22 MHz crystal
Insert UFO Color Board into PC Expansion Unit.
Locate 3 phono pins at edge of UFO Color Board.
Connect UFO TOP phono thru adapter to jumper cable to RED IN connector at back of Display.
Connect UFO MID phono thru adapter to jumper cable to GREEN IN connector at back of Display.
Connect UFO BOTTOM phono thru adapter to jumper cable to BLUE IN connector at back of Display.
Connect Display GREEN OUT to H.DRIVE/SYNCH IN.
Set RED termination switch to 75 OHM position.
Set GREEN termination switch to HIGH position.
Set BLUE termination switch to 75 OHM position.
Set H.DRIVE/SYNCH termination switch to 75 OHM position.
Power On Expansion Unit
Power On Conrac Display
Install and start color software (see below)
Adjust Conrac Display Horizontal and Vertical Synch if necessary
Power Off Conrac Display
Remove Conrac Cover
Locate Scan Board on left side as you face Display
In center of Board J25 is a large jumper plug with several wires
Set P25 to the middle position to select mid range of H Freq.
Power On Conrac Display
Adjust HORIZ FREQ potentiomiter R123 for horizontal hold.
Adjust VERT HOLD R2 if necessary
UFO COLOR DEMO
SOFTWARE INSTALLATION INSTRUCTIONS
Inside [Eris]<Lisp>Intermezzo>Basics>Lisp.sysout
(LOAD '{Eris}<LispCore>Library>DANDELIONUFO.DCOM)
(LOAD '{Eris}<LispCore>Library>READNUMBER.DCOM)
(LOAD '{Eris}<LispCore>Library>COLORDEMO.DCOM)
(\DANDELION\INITCOLORS)
(COLORDEMO)
For scanned images do:
(FILESLOAD {Eris}<Lisp>Intermezzo>Library>READAIS.DCOM)
(THREECOLORMAP 1 2 1)
(SHOWCOLORESAIS '{cyan}<AIS>Baboon '(1 2 1) )
(SHOWCOLORESAIS '{cyan}<AIS>Peppers '(1 2 1) )
SPEECH WORKBENCH DEMO
HARDWARE CHECK LIST
1108X DandeTiger with BusMaster-PC (See Check List and Installation Instructions above)
DT2801-A Data Translation (Marlborogh, MA) 27KHz 12bit 2DAC 16ADC Data Acquisition Card
IBM PC 64/256K Memory Expansion Option (stuffed with 64KBytes of DRAM).
Custom cable harness built from
3M number 3425 50-pin female connector (similar to Radio Shack 276-1525)
Radio Shack 42-2352 72" Shielded Stero cable to Phono Plugs
Radio Shack 271-1335 2 10KOhm resisters
Radio Shack 33-990A Microphone
Radio Shack 32-1115 Frequency Equalizer (Microphone pre-amp plus low pass filter)
Radio Shack 270-1455 AC Adapter for Equalizer
Radio Shack 31-1982B Stereo Amplifier
Radio Shack 40-2039A Speaker
Radio Shack 42-2370 Shielded cable for speaker, phono plug to stripped leads
Radio Shack 42-2365 Shielded cable phono plug to phono plug for Equalizer
SPEECH WORKBENCH DEMO
HARDWARE INSTALLATION INSTRUCTIONS
Set IBM PC Memory Expansion Jumpers for bank 1: On: 1,2,3,5; Off: 4,6,7,8
Insert IBM PC 64/256K Memory Expansion Card into PC Expansion Unit
Set DT2801-A jumpers to the Factory configuration: W1,3,4,7,9,11,13,15,19,23,26,27
Insert DT2801-A card into PC Expansion Unit
Build a Special DAC Cable as follows
(Data Translation User Manual page 3-8, 3-14)
(Old version of connector cable follows. new version exists also)
J1 connector:
A 2000 Ohm resister between Pins 17 and 18, AGND and Amp Low
Pin 17 AGND tied to unused pins 3,4,5,6,7,8,9,10,11,12,13,14,15,16
Pin 2 Chan 8 Audio Input signal
Pin 18 Amp Low Audio Input sheild
Pin 22 DAC 0 Out Audio Output signal
Pin 23 DAC 0 Gnd Audio Output sheild
Connect AC ADAPTER to EQUALIZER DC 9V connector.
Connect MICROPHONE to EQUALIZER MIC-IN connector.
Connect EQUALIZER LINE OUT to AMPLIFIER TAPE/TUNER L with audio cable.
Connect Special DAC Cable Grey Phono Plug to AMPLIFIER SPEAKER L.
Connect Special DAC Cable Black Phono Plug to AMPLIFIER TAPE/TUNER R.
Connect AMPLIFIER SPEAKER R to SPEAKER with audio cable with stripped lead.
Set EQUALIZER GAIN to center.
Set EQUALIZER IN/BYPASS to EQ IN.
Set EQUALIZER ON/OFF switch to ON
Set EQUALIZER Frequency Slide Controls up to +12 dB except 10KHz.
Set EQUALIZER 10KHz Frequency Slide Controls down to -12 dB.
Plug in AC ADAPTER .
Set AMPLIFIER SELECTOR switch to TAPE/TUNER.
Set AMPLIFIER MODE switch to STEREO.
Set AMPLIFIER TONE knob to center.
Set AMPLIFIER LEFT VOLUME to center (mic input level).
Set AMPLIFIER RIGHT VOLUME to center (speaker output level).
Plug in AMPLIFIER to 110 volt wall outlet.
SPEECH WORKBENCH DEMO
SOFTWARE INSTALLATION INSTRUCTIONS
Inside [Eris]<Lisp>Intermezzo>Basics>Lisp.sysout
load BusMaster and BusExtender according to BUSMASTER DIAGNOSTICS SOFTWARE INSTALLATION INSTRUCTIONS above
(SETQ HASHFILERDTBL) this variable is unbound in Lisp.sysout
(FILESLOAD '{Eris}<LispUsers>NOBOX)
(FILESLOAD '{IVY}<HTHOMPSON>LISP>DSL>PCDAC.DCOM)
(FILESLOAD '{IVY}<HTHOMPSON>LISP>DSL>BUSUTIL.DCOM)
(FILESLOAD '{IVY}<HTHOMPSON>LISP>DSL>DSL.DCOM)
(FILESLOAD '{Ivy}<Jellinek>WORK>NEWRTSD.DCOM)
(FILESLOAD '{Eris}<Speech>RTSDPATCH)
or
Insert "BusMaster Library and LispUser" floppy into drive
CONN {FLOPPY}
(SETQ HASHFILERDTBL) this variable is unbound in Lisp.sysout
FILESLOAD[NEWRTSD NOBOX PCDAC BUSUTIL DSL BUSUTIL RTSDPATCH)
DSL Speech Demo Script
CAUTIONS The promptwindows seem to be disappearing on me (Purcell 4/29). When nothing is happening Lisp may be waiting for input try a digit and return.
(NewShow (MakeSSForFile 'oscil 'XX NIL 1024 27000))
Making the window about 1/3 of a screen width and height looks good to me, but you can try other sizes.
(WINDOWPROP IT 'DontWrite T)
Mid-but "Record"
Adjust amplitude to fill region between hash-marks - if this is not possible by tweeking your amplifiers etc. then try (WINDOWPROP <the window> 'InputGainCode 1) to double the amplitude. You can go as far as 3 - the default is 0. Note that you have to stop recording (with STOP) before you can do anything else. Try changing the compression by mid-but in the compression window -- 10 looks good. (Note that because of a bug the new value will not be displayed therein until you next hit Record).
Mid-but Play and you will get the last 1.2 seconds of what you said - use this to adjust the output amplification. Use Quiet (right of Play) to shut it up. You can scroll around a bit after recording , but you will fall off the end very quickly, which cause a break (↑ is (here and nearly always) a safe recovery). Better to show off scrolling with a file. You can leave the original window up, and bring up a new one:
(NewShow (MakeSSForFile 'f1 '{CORE}F1.SPEECH NIL 1024 10000)).
Make this one a bit longer - maybe half the screen. Mid-but Record. Answer the prompt with something on the order of 5 or 10.
It starts recording with no pause after displaying "Type STOP to stop", so be ready to say something witty. It is a good idea to include pauses fairly frequently in what you say, so that subsequent segmentation is easier. Say your piece and hit STOP. Increase the compression, to 10 or even 30, so that most of the utterance is visible.
Scroll around (include thumbing) to show off. Mid-but Zoom (right of Link) to bring up a 10-to-1 expanded window below (this may require moving the whole ensemble - don't worry, they travel together).
Using the compressed window, extract a word or phrase by mid-but NewSS, giving it a name when prompted (or not if prompt window should get lost), e.g. the word you think it is, then respond to the cursor with "ss" in it by selecting first the left, then
the right hand ends of the segment. As long as you hold the left-but down, you can move the cursor around - the display shows time at the bottom and value and name at the top. DO NOT try to scroll while placing marks. Mid-but Toggle Marks, the right-but Redisplay to clean things up. Now mid-but Play Subss (right of Play) and grab one end of the segment with the "ss" jaws cursor to hear the sub-segment (look for feed back.
If you haven't got the boundaries right, then ToggleMarks in the lower, expanded window, Jump to the named mark, and use ChangeMark to drag a mark to a better position, then replay. If you have several marks close together, you mayu get a menu to arbitrate a selection - don't ever take the 'all' option- it's not implemented yet.
That's enought to be getting on with - all the menu items and sub-items have explain strings, so just hold on and you will get some help, I trust.
NEWRTSD Real time Speech Spectrum Demo
Welcome to the Xerox booth. We are showing our new expanded processor with floating point hardware, expanded control store, and array processor library running on larger memory. Attached to the processor is an expansion unit for controlling industry standard peripheral cards -- in this case, IBM PC compatible peripherals.
To demonstrate this new power, we have chosen a speech application, the processing of digitized speech and the computing of the spectogram display that you see in the center of the screen. I would like to emphasize the vertical integration, the bringing together for the first time of an array processor with a highly productive software environment and excellent user interfaces.
(RTSDINIT)
A large window with attached menus will appear at bottom of screen. Left-but Sample rate and Left-but 5(KHz). Left-but "Real-time spectrum" and graphical speech spectrogram will appear in window and process microphone input in real time. Adust the (left) volume control higher until grey background appears or until patterns are pleasing. Whistling up and down in frequency will produce a stripe that rises and falls with sound pitch. STOP key to stop. Left-button Height and 2 will double the presentation size. (Play and Record are disabled).
We sample the speech 10,000 times a second, every hundred microseconds. The primary structure that we want to display is the frequency content of this segment of speech.
To do that we are going to treat this segment of speech as a repeating periodic wave form. To do that accurately means that the left-hand side of the wave should meet the right-hand side, and it really doesn't. We have discontinuities because the frequency content is always changing. But for purpose of analysis, we're asking our algorithms to pretend that the frequency content of the speech is holding still across 25 milliseconds. Now I want to see energy as a function of frequency, not of time. So I perform a fast fourier transform. I display in the window a plot of frequency vs time. Each stripe of the speech is a picture of the frequency content within just 25 milliseconds, some one-fortieth of one second. I'd like to compute this a hundred times a second. I'd like to move down the speech wave form and compute the frequencies 10 milliseconds later, and 10 milliseconds after that and so on. Here you can see some of the structure of speechthe horizontal stripes you see are harmonics of the vocal cords' fundamental frequency. You see them particularly in the first KHz range, the bottom 20% of the scale. There you see the structure of vowels. This is a recognized form of printing speech that is used in speech research, in speech therapy, and a lot of speech disciplines.
This demo is not meant to be a polished speech workbench, it's a sample of what can be done with the floating point performance of this machine. Just to remind you, every vertical stripe required some 10,000 floating point operations. To do this kind of speech work requires about a million floating point operations per second of speech, something that the DandeTiger, the 1108X, is able to do in real time. It's worth speaking about the potential applications that this technology enables. For the first time, one can combine sophisticated Interlisp programs, expert systems as well as numerical front ends and number crunching to build intelligent signal-processing applications.
Our next new product is our expansion unit where we can drive industry standard peripherals, in this case, IBM PC cards. We will be demonstrating the analog to digital conversion of speech in this chassis. We can manipulate almost any peripheral using Lisp functions for reading a single address of the remote bus or writing a single address of the remote bus. We also have block transfer primitives to transfer blocks of data between remote memory and local memory at bus bandwidth. The bus master control is capable of running four DMA channels for driving high-speed devices.
We will be reading a speech sample every 100 microseconds, transferring it into the remote memory by means of the DMA channel. Periodically we will be transferring blocks of data from the remote memory to the local memory, using the block transfer. This will be integrated with the continuous real time display of the speech spectrogram. The peripheral expansion chassis is motivated by the desire to open more peripherals to our customers than we provide in our product line. We have the means for customers to create their own peripherals or add some of the hundreds or thousands of existing peripherals, and integrate them from Lisp. This way we can add color displays, special communications equipment, data acquisition kinds of things, even video disk controllers, optical memory.
Now, as I speak into the microphone, you see the picture of my voice appearing on the screen. It's a lot of noise. The structure is a little more clear if I were to whistle (do so). As the sound goes up, you see the plot go up, and as the sound drops, you will see the plot line drop. If I were to sing, you will see a more structured version of music.
That wraps up our demonstration.
Customer List
Internal
PARC
Venture
External
Inventory
Vendors
1- Conrac model 7211c19 w/ LPP option
Supplier:
Omega Video
14326 Iris
Lawndale, CA
(213) 643-9021
contact:Buzz Evans
Delivery 8weeks, net. 30
Price Qty (10 units/year volume) =$3230
RGB cables in stock or producible
2. Sigma Designs, IBM Expansion Chassis,Mod# SIGEWS-000, w/ driver board & cable.
Supplier:
WMD Micro Distributors
17351 Murphy Ave.
Irvine, CA 92714
(714) 660-1770
Price Qty 1=$655
contact: Mark Biewers
$655
The driver board and cable are not useable as per Purcell. Purcell indicates that The Sigma Designs Expansion Chassis is adequate as far as power supply is concerned, but the receiver card and cabling should come from IBM.
3. Dantiger Board w/ CPE option
Gary Porter
Xerox SPG/ED Manufacturing
El Segundo, CA
4. BusMaster Board
Ken Henderson
UFO Systems, Inc
Techniplex, 300 Main Street
East Rochester, New Yourk 14445
(716) 248-3372
5. Color Board, Part# 0017991, IBM-PC/XT, Hi Res. Color Board, 640x400, non- interlaced
Supplier:
UFO Systems, Inc.
300 Main St.
East Rochester, NY 14445
tel: (716) 248-3372
Attn: Barbara
Price qty 1=$995
6. IBM Expansion Unit Cable part no. 8529253
7. IBM Expansion Unit Receiver Card part no. ???????
Supplier:
IBM Parts Dist. Center
Greencastle, Ind.
(317) 658-2050
Service
Service would be handled by a BusMaster card replacement policy.
Lisp based Diagnostics can give a good confidence test of the BusMaster card, cables, and PC Expansion memory. The customer is responsible for aquiring the peripherals to which the BusMaster card is connected and therefore for obtaining service for them. Xerox would only be responsible for what Xerox provides: (1) 1108X with CPE card, (2) Ribbon cable connecting CPE and BusMaster Card and (3) BusMaster Cards. Since it is anticipated that sales of the BusMaster will be to knowledgeable customers, it is expected customer response to this level of service will be positive. Additional service would be provided on a time-and-materials basis
Product Engineering by SPG/ED
FCC Testing
UL Cirtification
Engineering change control
Packaging
Design 1 Don Tripp
Design 2 Bob Nishimura
Similar to Tripp design. Moved the card back from external connector.
Added a 4 inch extension cable for the 62 pin cable.