{NewInit11T.mc Lichtenberg 13-Jul-84 18:42:06 changed to initialize both versions of u1FFF Last modifiedby don: 9-Sep-83 9:51:57 Created by don: 2-Sep-83 13:38:39 Purcell 1-Jul-84 23:23:09 disabled writes to IOPage which moves from init{2000} to lisp{14000} } {SetTask[0];} RegDef[uLisp1FFF,U,2E]; {Lisp's u1FFF} Set[bigVMrefFlg, 75'b]; Set[InitVersion, 5]; { deleted initialization of the following U registers: uPcBreak uValHigh -- reinserted for Intermezzo compatability unboundPvar unboundFvar u3FF -- reinserted for Intermezzo compatability u3FFF -- reinserted for Intermezzo compatability added initialization of the following U registers: uSTATE uDTDbase uInitVersion added test of large VM: result to INTERFACEbasePage + bigVMrefFlg } StartNewInit: uRx ← Rx, c1; UQSave ← Q, c2; Q ← rhRx, c3; UGsave ← Q, c1; Rx ← Rx xor ~Rx, c2; uStkLimO ← Rx, c3; {can delete these 3 clicks eventually --- for compatability with Intermezzo} Rx ← VALspace, c1; uValHigh ← Rx, c2; Rx ← 3, c3; Rx ← Rx LRot8, c1; Rx ← Rx or 0FF, c2; u3FF ← Rx, c3; Rx ← Rx LRot4, c1; Rx ← Rx or 0F, c2; u3FFF ← Rx, c3; Rx ← InitVersion, c1; uInitVersion ← Rx, c2; , c3; Rx ← DTDbasePage, c1; Rx ← Rx LRot8, c2; uDTDbase ← Rx, c3; uSTATE ← 0, c1; uWP ← 0, c2; uWDC ← 0{uWDC inited by mesaInit}, c3; Rx ← ~0FD, c1; Rx ← Rx LRot8, c2; uBfResidualRhmask ← Rx{2FF}, c3; Rx ← 0A0, c1; Rx ← Rx LRot8, c2; uFreeStackBlock ← Rx{0A000}, c3; Rx ← 0FF + 1, c1; uFxNoPushReturn ← Rx{100h}, c2; Rx ← LShift1(Rx + Rx), SE←0, c3; uFxInCall ← Rx{400h}, c1; Rx ← 7F, c2; u7F ← Rx{7F}, c3; Rx ← ~0FF, c1;{OK} u0FF ← ~Rx{~0FF}, c2; uFF00 ← Q ← Rx{~0FF}, c3; Rx ← Q{0FF00} or 1, c1; Rx ← Rx LRot8, c2; u1FF ← Rx{1FF}, c3; Rx ← Q{0FF00} or 3, c1; Rx ← Rx LRot8, c2; uTT3FF ← Rx{3FF}, c3; Rx ← Q{0FF00} or 0F, c1; Rx ← Rx LRot8, c2; u0FFF ← Rx{0FFF}, c3; Rx ← Q{0FF00} or 1F, c1; Rx ← Rx LRot8, c2; u1FFF ← Rx{1FFF}, c3; uLisp1FFF {called u1FFF in lisp code} ← Rx, c1; , c2; , c3; Rx ← Q{0FF00} or 3F, c1; Rx ← Rx LRot8, c2; uTT3FFF ← Rx{3FFF}, c3; Rx ← Q{0FF00} or 7F, c1; Rx ← Rx LRot8, c2; u7FFF ← Rx{7FFF}, c3; Rx ← Q{0FF00} or 7, c1; Rx ← Rx LRot8, c2; u7FF ← Rx{7FF}, c3; uLispOptions ← 0, c1; Rx ← Rx xor 1, c2; u7FE ← Rx{7FE}, c3; Rx ← 80, c1; Rx ← Rx LRot8, c2; uBFmark ← Rx{8000}, c3; {compliance: using uSTACKspace with duplicated high byte for bind ptr} Rx ← STACKspace, c1; Rx ← Rx LRot8 or Rx, c2; uSTACKspace ← Rx, c3; Rx ← 0C0, c1; Rx ← Rx LRot8, c2; uFXmark ← Rx{C000}, c3; Set[UFNTablePageHalf, Rshift[UFNTablebase, 9]]; Rx ← UFNTablePageHalf, c1; Rx ← Rx LRot8, c2; uUFNTableBaseHalf ← Rx, c3; bigVMtest: Rx ← 5, c1; passTraps ← Rx, c2; Rx ← rhRx ← 0FF, c3; Map ← [rhRx,Rx], c1;{cause trap if bigVM not supported} , c2; Rx ← MD, GOTO[bigVMok], c3; bigVMok: rhRx ← INTERFACEspace, c1; Rx ← INTERFACEbasePage, c2; Rx ← Rx LRot8, c3; Map{InterfacePage} ← [rhRx, Rx], c1; passTraps ← 0, c2; rhRx ← Rx ← MD, c3; MAR ← [rhRx, bigVMrefFlg + 0], c1; MDR ← 1 {true}, c2; GOTO[uInitdone], c3; { in case of map fault come here } at[1, 4, errorType], Rx ← passTraps, c1; Ybus ← Rx xor 5, ZeroBr, c2; BRANCH[notmytrap, uInitdone], c3; notmytrap: Xbus← MStatus, XLDisp, GOTO[memFault], c1; uInitdone: Rx ← uRx, c1; Q ← UQSave, c2; rhRx ← UGsave, GOTO[BackFromNewInit], c3; { E N D }