:Title[LTraps.dmc, June 27, 1982 2:48 PM, Masinter]; * this file is a modified version of: *----------------------------------------------------------- * Title[ATraps.mc...August 15, 1981 10:20 PM...Taft]; * This file contains emulator-specific microcode for: * S-group opcodes that ordinarily trap; * Default disk region; * Map parameters. * This is the version for the strictly Alto emulator. * It should be renamed and edited for other emulators *----------------------------------------------------------- TopLevel; KnowRBase[AEmRegs]; Set[XTask, IP[EMU]]; InsSet[AEmuInsSet, 1]; *----------------------------------------------------------- GetEmulatorMapParams: * Returns in T some emulator-specific information for setting up the map: * T[0] = 1 to write-protect page 377, for XM Alto emulation; * 0 to emulate a non-XM Alto. * T[4:15] = the VA[4:15] to be used to define the main 64K memory * region for Alto emulation (i.e., loaded into the high * part of MDS). Should be 0 in all emulators except Lisp. *----------------------------------------------------------- Subroutine; T_ LEmuBrHiVal, Return; * Lisp AEMU region TopLevel; *----------------------------------------------------------- VERS: * Alto Version instruction * structure VERS: * eng bit 4 // engineering number * build bit 4 // build number * microcode bit 8 // microcode version * For Dorado, the engineering number is 5. * The build number (use of which has been discontinued on the Alto) is * taken over to indicate the emulator(s) included in the current microcode: * 0 Alto emulator only * 1 Alto + Alto Mesa * 2 Alto + PrincOps Mesa * 3 Alto + Cedar Mesa * 4 Alto + Lisp * 5 Alto + Smalltalk 76 * 6 Alto + Smalltalk 78 *----------------------------------------------------------- Stack_ add[lshift[5,14], * eng# 5 lshift[4,10] * build# 4 ]C, At[SD400, 14], IFUJump[0]; *----------------------------------------------------------- * Parameterless Alto instructions (NOPAR group) that are * undefined on the Dorado *----------------------------------------------------------- IFUJump[0], At[SD400, 7]; *61007, StartIntervalTimer Branch[NPTrap], At[SD400, 10]; *61010, JumpRAM Stack_ A0, IFUJump[0], At[SD400, 11]; *61011, ReadRAM IFUJump[0], At[SD400, 12]; *61012, WriteRAM Branch[NPTrap], At[SD400, 15]; *61015, Double Read Branch[NPTrap], At[SD400, 16]; *61016, Double Write Branch[NPTrap], At[SD400, 17]; *61017, Double Exchange Branch[NPTrap], At[SD400, 22]; *61022, Diagnostic Branch[NPTrap], At[SD400, 23]; *61023, Diagnostic * Branch[NPTrap], At[SD400, 27]; *61027, SET DISPLAY RATE Branch[NPTrap], At[SD400, 30]; *61030, not used Branch[NPTrap], At[SD400, 31]; *61031, not used Branch[NPTrap], At[SD400, 35]; *61035, not used *----------------------------------------------------------- * S-Group opcodes that trap * Note: Trap## uses dispatch word at 530+##+ID (## = 00, 17, or 36). * Trapx uses dispatch word at 400+T. * All of these trap routines expect RBase = rbAEmRegs. *----------------------------------------------------------- * EmIFUTrap[opcode, IMaddress, N] M[EmIFUTrap, IFUPause[#1, 2, MDS, rbAEmRegs, #2, #3, 0, 0]]; EmIFUTrap[141, Trap00, 01]; * 60400-60777 EmIFUTrap[143, Trap00, 03]; * 61400-61777 EmIFUTrap[144, Trap00, 04]; * 62000-62377 EmIFUTrap[145, Trap00, 05]; * 62400-62777 EmIFUTrap[146, Trap00, 06]; * 63000-63377 EmIFUTrap[147, Trap00, 07]; * 63400-63777 EmIFUTrap[150, Trap00, 10]; * 64000-64377 EmIFUTrap[153, Trap00, 13]; * 65400-65777 EmIFUTrap[154, Trap00, 14]; * 66000-66377 EmIFUTrap[155, Trap00, 15]; * 66400-66777 * EmIFUTrap[157, Trap17, 00]; * 67400-67777 EmIFUTrap[160, Trap17, 01]; * 70000-70377 EmIFUTrap[161, Trap17, 02]; * 70400-70777 EmIFUTrap[162, Trap17, 03]; * 71000-71377 EmIFUTrap[163, Trap17, 04]; * 71400-71777 EmIFUTrap[164, Trap17, 05]; * 72000-72377 EmIFUTrap[165, Trap17, 06]; * 72400-72777 EmIFUTrap[166, Trap17, 07]; * 73000-73377 EmIFUTrap[167, Trap17, 10]; * 73400-73777 EmIFUTrap[170, Trap17, 11]; * 74000-74377 EmIFUTrap[171, Trap17, 12]; * 74400-74777 EmIFUTrap[172, Trap17, 13]; * 75000-75377 EmIFUTrap[173, Trap17, 14]; * 75400-75777 EmIFUTrap[174, Trap17, 15]; * 76000-76377 EmIFUTrap[175, Trap17, 16]; * 76400-76777 EmIFUTrap[176, Trap36, 00]; * 77000-77377 EmIFUTrap[177, Trap36, 01]; * 77400-77777 IFUPause[157, 2, MDS, rbAEmRegs, LTrap, noNData, 0, 0]; * 67400-67777 *----------------------------------------------------------- * Dummy BCPL runtime routines, if BCPLRuntime.dib not loaded. * These labels are redefined if BCPLRuntime is actually loaded. * This code is here because it gets bound too early if included in * AEmu assembly. It must be loaded before BCPLRuntime. *----------------------------------------------------------- JSRz300: Q_ PCX', Branch[JSRx]; JSRiz340: Fetch_ T, FlipMemBase, Branch[JSRix]; (635)\f8