Parallel Port for the 1100 and for the 1108 with Extended Processor Option (CPE) The 1100 has a parallel port connector with 8 bidirectional data lines, 8 unidirectional output lines (with inverted duplicates for noise immunity), and 5 unidirectional input lines. The 1108 with Extended Processor Option (CPE) has a similar parallel port connector: the differences are (1) it has 6 unidirectional input lines vs. 5, (2) the power lines of the connector are 5 volts vs. 12, and (3) the pin layouts are "reversed". (These differences are also described below in the "Pin List".) A cable adapter is available to map the 1108's parallel port's pin layout into that of the 1100, or vice versa. This document describes the protocol for the parallel port connector, and basic Interlisp-D functions for accessing it. The maximum transfer rate when the parallel port is accessed directly from the Interlisp-D functions below is about 240K operations/second. Centronics-driver block-transfer microcode will be able to transfer data as fast as the Centronics standard will allow. On the 1108, the parallel port connector is the CPE board's upper D-37 connector J2 (female), also cabled to the "PAR PORT" connector on the rear of the 1108. Description of signals on the connector PIO.0-7 Bidirectional data lines. Driven by the central processor if PO.7 = 1, input if PO.7=0. PI.0-4/5 Input data lines. (PI.0-4 on the 1100; PI.0-5 on the 1108.) PO.0-6 Output data lines. PO.7 Output data line. Special in that: If PO.7=0='output' then the bidirectional lines PIO.0-7 are driven by the central processor (and, on the 1108, a program reading the parallel port will read a set of miscellaneous status lines rather than the values of PIO.0-7 as on the 1100); If PO.7=1='input' then the bidirectional lines PIO.0-7 are not driven by the central processor, and a program reading the parallel port will read the input values of PIO.0-7; PO.0'-7' Output data lines. Inverted copies of PO.0-7. Signals are TTL levels. All output lines are latched; input lines are read asynchronously. On the 1108 only, other hardware has status flags "hidden" in the parallel port. Microcode for this other hardware must sometimes set PO.7=1 to enable access to these flags. As a result, the user device on the parallel port, and its handshaking protocol, must tolerate that at any time when PO.7=1 (PIO.0-7 output drivers disabled), PO.7 may be toggled to 0 then back to 1, briefly enabling the central processor's output drivers on PIO.0-7. This disruption is otherwise invisible to the parallel port user. This disruption can be avoided during uninterruptable microcode. Pin List pin no. signal pin no. pin no. signal pin no. (1100) name (1108) (1100) name (1108) 1 PIO.0 19 20 PO.0 37 2 PIO.1 18 21 PO.0' 36 3 PIO.2 17 22 PO.1 35 4 PIO.3 16 23 PO.1' 34 5 PIO.4 15 24 PO.2 33 6 PIO.5 14 25 PO.2' 32 7 PIO.6 13 26 PO.3 31 8 PIO.7 12 27 PO.3' 30 9 PI.0 11 28 PO.4 29 10 PI.1 10 29 PO.4' 28 11 PI.2 9 30 PO.5 27 12 PI.3 8 31 PO.5' 26 13 PI.4 7 32 PO.6 25 14 12volt 5volt 6 33 PO.6' 24 15 12volt 5volt 5 34 PO.7 23 16 resv'd 4 35 PO.7' 22 17 GND 3 36 GND PI.5 21 18 GND 2 37 GND 20 19 GND 1 The 1108's 5volt lines will drive about 1 amp. Interlisp-D access (WRITEPRINTERPORT datum) Writes the less significant 16 bits of the integer datum to the parallel port. The format is: PO.0,..PO.7,PIO.0,..,PIO.7 (least significant bit). All outputs to the parallel port are latched. Note that the value written to PO.7 controls whether PIO.0-7 are driven (output) or passive (input). On the 1108, the value written to PO.7 also affects the results of READPRINTERPORT. (READPRINTERPORT) Reads a 16-bit datum from the parallel port, returning it as a positive integer. The more significant 6 bits of these 16 are (most significant first) PI.0,..,PI.5. The next less significant two bits are not relevant to parallel port i/o. On the 1100, the least significant 8 bits of the result are PIO.0,..,PIO.7 (least significant bit). On the 1108, the least significant 8 bits of the result are relevant to parallel port i/o only if the value most recently written to PO.7 was 1, in which case they are PIO.0,..,PIO.7 (least significant bit) as on the 1108. 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