{ File: RS232CMisc.asm
Modification History:
Last change by Chuck Fay : 9-Jan-83 19:04:04: Fix send break command.
Last change by Jim Frandeen : September 8, 1982 4:56 PM: Change handling of abort.
Last change by Jim Frandeen : August 5, 1982 10:36 AM: new IO Page format
Created by Jim Frandeen : March 25, 1982 1:53 PM
}

Get "SysDefs"
Get "CommonDefs"
Get "RS232CDefs"

IMPAsyncRS232CInterrupt;From Rs232CInterrupts
IMPAbortGetFlag;From RS232CGet
IMPAbortPutFlag;From RS232CPut
IMPAsyncGetLoop;From RS232CGet
IMPAsynchronousDivisor;From SIOSubs
IMPBEL1;From BisyncInterrupts
IMPBEL6;From BisyncInput
IMPBisyncGetLoop;From RS232CGet
IMPBisyncRS232CInterrupt;From Rs232CInterrupts
IMPBisyncTimerTable;From SIOSubs
IMPCopy;From CPSubs
IMPDisableRST;From Common
IMPDisableRxCRC1;From BisyncInput
IMPDisableRxCRC2;From BisyncInput
IMPDisableRxCRC3;From BisyncInput
IMPDisableTxCRC1;From BisyncInterrupts
IMPDisableTxCRC2;From BisyncInterrupts
IMPDisableTxCRC3;From BisyncInterrupts
IMPDisableTxCRC4;From BisyncInterrupts
IMPDisableTxCRC5;From BisyncInterrupts
IMPDisableTxCRC6;From BisyncInterrupts
IMPDisableTxCRC7;From BisyncInterrupts
IMPEnableRST;From Common
IMPEnableRxCRC1;From BisyncInput
IMPEnableRxCRC2;From BisyncInput
IMPEnableRxCRC3;From BisyncInput
IMPEnableRxCRC4;From BisyncInput
IMPEnableTxCRC1;From BisyncInterrupts
IMPEnableTxCRC2;From BisyncInterrupts
IMPEnableTxCRC3;From BisyncInterrupts
IMPEnableTxCRC4;From BisyncInterrupts
IMPEnableTxCRC5;From BisyncInterrupts
IMPEndOfBisyncFrame;From BisyncInput
IMPENQ1;From BisyncInterrupts
IMPENQ2;From BisyncInterrupts
IMPENQ4;From BisyncInterrupts
IMPENQ6;From BisyncInput
IMPENQ9;From BisyncInput
IMPENQ10;From BisyncInput
IMPENQ11;From BisyncInput
IMPENQ12;From BisyncInterrupts
IMPEnterHuntMode1;From BisyncInput
IMPEnterHuntMode2;From BisyncInput
IMPEOT1;From BisyncInterrupts
IMPEOT6;From BisyncInput
IMPEOTEndFrameSwitch;From BisyncInput
IMPEOT3270;From BisyncInput
IMPETB2;From BisyncInterrupts
IMPETB4;From BisyncInterrupts
IMPETB5;From BisyncInterrupts
IMPETB6;From BisyncInterrupts
IMPETB7;From BisyncInput
IMPETB8;From BisyncInput
IMPETB9;From BisyncInput
IMPETB10;From BisyncInput
IMPETB11;From BisyncInput
IMPETB12;From BisyncInterrupts
IMPGetModeSwitch;From RS232CGet
IMPGetTaskResumeAddress;From RS232CGet
IMPGetTaskQuiet;From RS232CGet
IMPHLPlus2A;From SIOSubs
IMPNAK1;From BisyncInterrupts
IMPNAK6;From BisyncInput
IMPOneSecondTimerLow;From BisyncInterrupts
IMPOneSecondTimerHigh;From BisyncInterrupts
IMPPortBusyFlag;From CPSubs
IMPPrevAsyncDCD;From RS232CInterrupts
IMPPrevCTS;From RS232CInterrupts
IMPPrevBisyncDCD;From RS232CInterrupts
IMPPrevSdlcDCD;From BisyncInterrupts
IMPPutAsyncMode;From RS232CPut
IMPPutBisyncMode;From RS232CPut
IMPPutSdlcMode;From RS232CPut
IMPPutModeSwitch;From RS232CPut
IMPPutTaskResumeAddress;From RS232CPut
IMPPutTaskQuiet;From RS232CPut
IMPReadCPBuffer;From CPSubs
IMPResetChannels;From SIOSubs
IMPRS232CGetFlag;From BookKeepingTask
IMPRS232CInterruptSwitch;From Common
IMPRS232CPutFlag;From BookKeepingTask
IMPRS232CMiscFlag;From BookKeepingTask
IMPRS232CMiscCommand;From BookKeepingTask
IMPSdlcGetLoop;From RS232CGet
IMPSdlcRS232CInterrupt;From Rs232CInterrupts
IMPSetAsyncTimer;From RS232CSubs
IMPSetBaudRate;From SIOSubs
IMPSetRS366;From SIOSubs
IMPStartGetTask;From RS232CGet
IMPStartPutTask;From RS232CPut
IMPSYN1;From BisyncInterrupts
IMPSYN2;From BisyncInterrupts
IMPSYN3;From BisyncInterrupts
IMPSYN4;From BisyncInterrupts
IMPSYN5;From BisyncInterrupts
IMPSYN6;From BisyncInterrupts
IMPSYN7;From BisyncInput
IMPSYN8;From BisyncInput
IMPSYN9;From BisyncInput
IMPSYN10;From BisyncInput
IMPSYN11;From BisyncInput
IMPSYN12;From BisyncInterrupts
IMPSynchronousDivisor;From SIOSubs
IMPWriteCPBuffer;From CPSubs
IMPZeroCommand;From Common

EXPCurrentCharLengthMask;Parameter
EXPCurrentRS366Status;Parameter
EXPCurrentSyncCharacter;Parameter
EXPCurrentSyncCount;Parameter
EXPRS232CMode;Parameter
EXPRS232CTaskWakeMask
EXPRxWR1;Parameter
EXPRxWR3;Parameter
EXPRxWR4;Parameter
EXPTxWR1;Parameter
EXPTxWR4;Parameter
EXPTxWR5;Parameter
;
RS232CMiscTask:
LDAPortBusyFlag
ORAA
JNZMiscYield

DBopJMP
MiscTaskResumeAddress:
DWCheckMiscFlag
;
JMPWaitForGetAbort
;
JMPWaitForPutAbort

CheckMiscFlag:
LDARS232CMiscFlag
ORAA
JPMiscYield

LXIH,ReadMiscCSB
CALLReadCPBuffer

{The Misc Task implements the following commands. The command numbers are defined in IOPInterfaceDefs.mesa.}

LDARS232CMiscCommand
ORAA
JZDoOn;Zero is On command
CPI1
JZDoOff
CPI2
JZDoBreakOn
CPI3
JZDoBreakOff
CPI4
JZDoAbortInput
CPI5
JZDoAbortOutput
CPI6
JZDoSetRS366Status
CPI7
JZDoGetStatus
CPI8
JZDoMajorSetParameters
CPI14
JZDoMinorSetParameters
BREAK

{Continue if IOP Command is invalid.}
JMPResetMiscTaskFlag
;
RS232CMiscCSB:
RS232CParameter4:
DS2;1402C
RS232CParameter3:
DS1;1402D low
RS232CParameter3Hi:
DS1;1402D high
RS232CParameter2:
DS1;1402E
RS232CParameter2Hi:
DS1;1402E high
RS232CParameter1:
DS1;1402F low
RS232CParameter1Hi:
DS1;1402F high
RS232CTaskWakeMask:
DS2;14030

RS232CParameter:
DS1;14036 low
RS232CParameterHi:
DS1;14036 high


RS232CDeviceStatus:
DS1;14035 low
RS232CDeviceStatusHi:
DS1;14035 high


CurrentParameters:
; Channel A is the Rx Channel on the Z80 SIO chip
RxWR1: DB
0
RxWR3: DB
0
RxWR4: DB
0
RxWR5: DB
0

; Channel B is the Rx Channel on the Z80 SIO chip
TxWR1: DB
0
TxWR4: DB
0
TxWR5: DB
0

CurrentCode:
DB0;0 = Ascii, 1 = Ebcdic

{The following characters will be replaced by the Ebcdic or Ascii values, depending on the code used.}
BEL:
DB0
ENQ:
DB0
EOT:
DB0
ETB:
DB0
NAK:
DB0
SYN:
DB0
CurrentRS366Status:
DB0; RS366 Test Status Storage (LocalTim+SIOLpEn)
CurrentParametersSize EQU CurrentRS366Status-RxWR1+1


SdlcDefaultParameters:
{
Default Values for Sdlc mode. These will be moved into CurrentParameters above.}

{RxWR1:}
DBIntOnAllRxCharacters+ExternalIntEnable
{RxWR3:}
DBRxCRCEnable
{RxWR4:}
DBX1ClockMode+SdlcMode
{RxWR5:}
DB0

{TxWR1:}
DBStatusAffectsVector+ExternalIntEnable+TxIntEnable
{TxWR4:}
DBX1ClockMode+SdlcMode
{TxWR5:}
DBTxCRCEnable+TxEnable

{Code:}
DB0
{BEL:}
DB0
{ENQ:}
DB0
{EOT:}
DB0
{ETB:}
DB0
{NAK:}
DB0
{SYN:}
DB0
{Rs366Status:}
DB0


AsyncDefaultParameters:
{
Default Values for Async mode. These will be moved into CurrentParameters above.}

{RxWR1:}
DBIntOnAllRxCharacters+ExternalIntEnable
{RxWR3:}
DB0
{RxWR4:}
DBX16ClockMode
{RxWR5:}
DB0

{TxWR1:}
DBStatusAffectsVector+ExternalIntEnable+TxIntEnable
{TxWR4:}
DBX16ClockMode
{TxWR5:}
DBTxEnable

{Code:}
DB0
{BEL:}
DB0
{ENQ:}
DB0
{EOT:}
DB0
{ETB:}
DB0
{NAK:}
DB0
{SYN:}
DB0
{RS366Status:}
DBLocalTim


BisyncDefaultParameters:
{Default values for Bisync mode. These will be moved into CurrentParameters above.}

{RxWR1:}
DBIntOnAllRxCharacters+ExternalIntEnable
{RxWR3:}
DB0
{RxWR4:}
DBX1ClockMode+SyncCharacter16Bits
{RxWR5:}
DBBisyncCRC

{TxWR1:}
DBStatusAffectsVector+ExternalIntEnable+TxIntEnable
{TxWR4:}
DBX1ClockMode+SyncCharacter16Bits
{TxWR5:}
DBTxEnable+BisyncCRC

{Code:}
DBEbicdic
{BEL:}
DBEbcdicBELL
{ENQ:}
DBEbcdicENQ
{EOT:}
DBEbcdicEOT
{ETB:}
DBEbcdicETB
{NAK:}
DBEbcdicNAK
{SYN:}
DBEbcdicSYN
{RS366Status:}
DB0
;
{ Other Parameters}

RS232CMode:
DB0; current mode (0=Sdlc, 1=Bisync, 2=Async)

CurrentCorrespondents:
DB0
{0 = xerox800
1 = xerox850
2 = system6
3 = cmcII
4 = ttyHost
5 = oisSystemElement
6 = ibm3270Host
7 = ibm2770Host
8 = ibm6670Host
9 = ibm6670
10 = xerox860
11 = oisSystemElementBSC}

CurrentSyncCount:
DB0;Set from RS232CParameter2
CurrentSyncCharacter:
DB0;Set from RS232CParameter3
CurrentBaudRate:
DB0;Set from RS232CParameter1
{0 = 50 Baud
1 = 75 Baud
2 = 110 Baud
3 = 134.5 Baud
4 = 150 Baud
5 = 300 Baud
6 = 600 Baud
7 = 1200 Baud
8 = 2400 Baud
9 = 3600 Baud
10 = 4800 Baud
11 = 7200 Baud
12 = 9600 Baud
13 = 19200 Baud
14 = 48000 Baud
15 = 56000 Baud}

{CurrentCharLengthMask will be replaced by one of the entries from the table below.}
CurrentCharLengthMask:
DB0FFH; character length mask

CurrentCharLengthMaskTable:
DB01FH; 5 bits
DB03FH; 6 bits
DB07FH; 7 bits
DB0FFH; 8 bits

{This character length table is set up for WR3.}
CharLengthTable:
DB0; 0=Character Length 5 of SIO Command
DB80H; 80H=Character Length 6 of SIO Command
DB40H; 40H=Character Length 7 of SIO Command
DB0C0H; 0C0H=Character Length 8 of SIO Command

AsciiCodeTable:
{Code:}
DBAscii
{BEL:}
DBAsciiBELL
{ENQ:}
DBAsciiENQ
{EOT:}
DBAsciiEOT
{ETB:}
DBAsciiETB
{NAK:}
DBAsciiNAK
{SYN:}
DBAsciiSYN
AsciiCodeTableSize EQU 7

ReadMiscCSB:
DWRS232CMiscCSBLoc; CP Buffer Pointer Low
DWCPIOPageHi; CP Buffer Pointer Hi
DWRS232CMiscCSBSize; CP Buffer Count in bytes
DWRS232CMiscCSB; Pointer to IOP Buffer

ZeroMiscFlag:
DWRS232CMiscFlagLoc; CP Buffer Pointer Low
DWCPIOPageHi; CP Buffer Pointer Hi
DW2; CP Buffer Count in bytes
DWZeroCommand; Pointer to IOP Buffer

SendDeviceStatus:
; to transfer RS232C Device Status to CP IOPage
DWRS232CDeviceStatusLoc; CP Buffer Pointer Low
DWCPIOPageHi; CP Buffer Pointer Hi
DWRS232CDeviceStatusSize; CP Buffer Count in bytes
DWRS232CDeviceStatus; Pointer to IOP Buffer

SendParameter:
; to transfer RS232C Parameter Outcome to IOPage
DWRS232CParameterLoc; CP Buffer Pointer Low
DWCPIOPageHi; CP Buffer Pointer Hi
DWRS232CParameterSize; CP Buffer Count in bytes
DWRS232CParameter; Pointer to IOP Buffer
;
{ Local subroutines}

CopyParameters:
{Copy default parameters into CurrentParameters. On entry, DE points to default parameters, and HL points to the address to be used for RS232C interrupts. Set up the interrupt table address first.}
SHLDRS232CInterruptSwitch
XCHG;HL ← address of parameters
LXID,CurrentParameters
MVIA,CurrentParametersSize
JMPCopy;Copy and RET

CheckResetRingHeard:
{If ResetRingHeard bit is set, reset the RingHeardLatch.}
LDARS232CParameter2Hi; Reset Ring Hard, if required
ANICPRRHMask
RZ
XRAA
STARingHeardLatch
RET

UpdateTxWR5:
{This procedure is called whenever WR5 changes. We update the value of WR5 with and without CRCEnable for the Bisync interrupt routine.}
STATxWR5;Update WR5
STADisableTxCRC1
STADisableTxCRC2
STADisableTxCRC3
STADisableTxCRC4
STADisableTxCRC5
STADisableTxCRC6
STADisableTxCRC7
ORITxCRCEnable
STAEnableTxCRC1
STAEnableTxCRC2
STAEnableTxCRC3
STAEnableTxCRC4
STAEnableTxCRC5
RET
;
DoOn:
MVIA,Rst65DisableMsk
CALLEnableRST

{Initialize state of Clear To Send and Data Carrier Detect so we will know if they change.}
XRAA
STAPrevAsyncDCD
STAPrevCTS
STAPrevBisyncDCD
STAPrevSdlcDCD
JMPResetMiscTaskFlag


DoAbortInput:
STAAbortGetFlag
LXIH,WaitForGetAbort
JMPSaveMiscResumeAddressAndYield

WaitForGetAbort:
LDAAbortGetFlag; the last thing it does is reset the abort flag
ORAA
JNZMiscYield; if not stopped, keep waiting
JMPRestoreMiscResumeAddress; if so, quit now.


{Break key handling -- a break is defined to be holding the serial data transmit line low for 190 milliseconds or more. To send a break, you have to tell the SIO chip to hold the transmit line low, wait for 190 milliseconds or more, and then tell the SIO chip to stop holding the line low. The SIO chip will hold the transmit line low if you turn on the "Send Break" bit in write register 5. It stops holding it low when you turn off the bit. The waiting is done in the Dandelion RS232C head.}

DoBreakOff:
LXIH,TxCont+8000H;HL points to TxCont register
LDATxWR5
DI
MVIM,PointToWR5;Send address of WR5
MOVM,A;Send turn break off command
EI
JMPResetMiscTaskFlag

DoBreakOn:
LXIH,TxCont+8000H;HL points to TxCont register
LDATxWR5
ORISendBreak
DI
MVIM,PointToWR5;Send address of WR5
MOVM,A;Send turn break on command
EI
{Now abort any puts in progress -- fall through to DoAbortOutput}


DoAbortOutput:
STAAbortPutFlag
LXIH,WaitForPutAbort
JMPSaveMiscResumeAddressAndYield

WaitForPutAbort:
LDAAbortPutFlag
ORAA; the last thing it does is reset the abort flag
JNZMiscYield; if not stopped, keep waiting
RestoreMiscResumeAddress:
LXIH,CheckMiscFlag
SHLDMiscTaskResumeAddress
JMPResetMiscTaskFlag; if so, quit now.


DoOff:
MVIA,Rst65DisableMsk
CALLDisableRST; Disable Rst 6.5 interrupt
CALLResetChannels
LXIH,GetTaskQuiet
SHLDGetTaskResumeAddress
LXIH,PutTaskQuiet
SHLDPutTaskResumeAddress
JMPResetMiscTaskFlag
;
DoMajorSetParameters:
{Set CurrentParameters depending on RS232CParameter2Hi:

(mask 3):
0 => Sdlc
1 => Bisync
2 => Async
}
{Set the mode.}
LDARS232CParameter2Hi
ANICPLineTypeMask
STARS232CMode
JZSetSdlcParameters;Zero is Sdlc mode
CPICPBisyncMode
JZSetBisyncParameters

SetAsyncParameters:
{Set up the Async timer.}

LHLDRS232CParameter4; get user-supplied timeout value
MVIA,1; Set timer not running
CALLSetAsyncTimer
LXIH, PutAsyncMode
SHLDPutModeSwitch; Set JMP instruction
LXIH,AsyncGetLoop
SHLDGetModeSwitch
LXIH,AsyncRS232CInterrupt
LXID,AsyncDefaultParameters
CALLCopyParameters

{In Async mode, check for one or two Stop bits and set up WR4 depending on RS232CParameter2Hi:

(mask 4):
0 => 1 Stop bit
1 => 2 Stop bits}
MVID,StopBits1
LDARS232CParameter2Hi
ANICPStopBitsMask
JZSetStopBits
MVID,StopBits2
SetStopBits:
LDATxWR4
ORAD
STATxWR4
LDARxWR4
ORAD
STARxWR4
LXIH,AsynchronousDivisor
JMPSetBaud

SetBisyncParameters:
LXIH, PutBisyncMode
SHLDPutModeSwitch; Set JMP instruction
LXIH,BisyncGetLoop
SHLDGetModeSwitch
LXIH,BisyncRS232CInterrupt
LXID,BisyncDefaultParameters
CALLCopyParameters
LXIH,SynchronousDivisor
JMPSetBaud

SetSdlcParameters:
LXIH,PutSdlcMode
SHLDPutModeSwitch; Set JMP instruction
LXIH,SdlcGetLoop
SHLDGetModeSwitch
LXIH,SdlcRS232CInterrupt
LXID,SdlcDefaultParameters
CALLCopyParameters
LXIH,SynchronousDivisor

SetBaud:
{Set the baud rate. HL points to Divisor table.}
LDARS232CParameter1Hi; Set Baud Rate
ANICPLineSpeedMask; Async:x16, Sync or Sdlc:x1
STACurrentBaudRate
CALLSetBaudRate

SetSyncCharacter:
LDARS232CParameter3
STACurrentSyncCharacter

{If ResetRingHeard bit is set, reset the RingHeardLatch.}
CALLCheckResetRingHeard

{Set up the parity parameters in WR4 depending on RS232CParameter2 (mask 0E0):

0 => no parity
20H (1) => odd parity
40H (2) => even parity
60H (3) => one parity (no parity specified, but add "1" bit)
80H (4) => zero parity (no parity specified, but add "0" bit)
Set up B to contain the bits to OR into WR4.}

MVID,0; Assume no parity
LDARS232CParameter2
ANICPParityMask
JZSetParity;zero => no parity
CPICPOneParity
JZSetParity
CPICPZeroParity
JZSetParity
MVID,ParityOdd;if parity is specified
CPICPOddParity
JZSetParity
MVID,ParityEven

SetParity:
LDARxWR4
ORAD
STARxWR4
LDATxWR4
ORAD
STATxWR4

{Set the character length depending on the character length (mask 18):

0 => char length = 50
8H (1) => char length = 680
10H (2) => char length = 740
18H (3) => char length = 8C0}

LDARS232CParameter2; Charcter Length Check
ANICPCharLMask;A ← LLxxx
RRC;A ← LLxx
RRC;A ← LLx
RRC;A ← LL

{Pick up the character length code that we will use to set WR3, and set up WR3.}
MOVE,A;DE ← character length code * 2
MVID,0
LXIH,CharLengthTable
DADD;HL ← CharLengthTable + length code
LDARxWR3; Set Character Length
ORAM
STARxWR3

{The character length code for WR5 is the character length code for WR3 shifted right one position. Set up WR5.}
ANIRx8BitsPerCharacter;A ← character length for WR3
RRC;A ← character length for WR5
MOVH,A
LDATxWR5
ORAH
STATxWR5

{Set up the character length mask.}
LXIH,CurrentCharLengthMaskTable
DADD;HL ← CurrentCharLengthMaskTable + length code
MOVA,M
STACurrentCharLengthMask


{Set Data Terminal Ready (DTR) in WR5 if this bit is set in the parameter.}
LDARS232CParameter2Hi; Check Command
ANICPDTRMask;Mask = 8
JZCheckRTS
LDATxWR5; Set DTR bit if command bit is 1
ORIDTR
STATxWR5

CheckRTS:
{Set Clear To Send (CTS) in WR5 if this bit is set in the parameter.}
LDARS232CParameter2Hi; Check Command
ANICPRTSMask;Mask = 10H
JZCheckRingHeard
LDATxWR5; Set DTR bit if command bit is 1
ORIRTS
CALLUpdateTxWR5

CheckRingHeard:
{Turn off RingHeardLatch if ResetRingHeard is set in the parameter.}
LDARS232CParameter2Hi; Reset Ring Hard, if required
ANICPRRHMask
JZCheckCorrespondent
XRAA
STARingHeardLatch

CheckCorrespondent:
{Check the Correspondent specified in RS232CParameter3Hi:
0 = xerox800
1 = xerox850
2 = system6
3 = cmcII
4 = ttyHost
5 = oisSystemElement
6 = ibm3270Host
7 = ibm2770Host
8 = ibm6670Host
9 = ibm6670
10 = xerox860
11 = oisSystemElementBSC

If we are running in BiSync mode, we assume the code is EBCDIC. Check to see if we have a correspondent that requires an ASCII code.}
LDARS232CParameter3Hi; Set Correspondents
STACurrentCorrespondents
CPIIBM3270Host
LXIH,EndOfBisyncFrame;Assume not 3270 host
JNZSetEOTEndFrameSwitch

{If the host is a 3270, it requires special treatment for EOT EndOfFrame.}
LXIH,EOT3270

SetEOTEndFrameSwitch:
SHLDEOTEndFrameSwitch

CPIXerox850
JZSetAsciiCode
CPIxerox860
JNZSaveSynCount

SetAsciiCode:
LXIH,AsciiCodeTable
LXID,CurrentCode
MVIA,AsciiCodeTableSize
CALLCopy

SaveSynCount:
{Save the number of SYN characters to send.}
LDARS232CParameter2; Save Sync Count value
ANICPSyncCntMask
STACurrentSyncCount

{Perform common initialization for Get and Put tasks.}
XRAA
STAAbortGetFlag
STAAbortPutFlag
LXIH,StartGetTask
SHLDGetTaskResumeAddress
LXIH,StartPutTask
SHLDPutTaskResumeAddress
;
{Initialize depending on the current Mode.}
LDARS232CMode
ORAA
JZInitializeSdlcMode
CPICPAsyncMode
JZInitializeAsyncMode

InitializeBisyncMode:
{Continue if mode is Bisync. Initialize character values for parsing depending on the character set.}
LDABEL
STABEL1
STABEL6
LDAENQ
STAENQ1
STAENQ2
STAENQ4
STAENQ6
STAENQ9
STAENQ10
STAENQ11
STAENQ12
LDAEOT
STAEOT1
STAEOT6
LDAETB
STAETB2
STAETB4
STAETB5
STAETB6
STAETB7
STAETB8
STAETB9
STAETB10
STAETB11
STAETB12
LDANAK
STANAK1
STANAK6
LDASYN
STASYN1
STASYN2
STASYN3
STASYN4
STASYN5
STASYN6
STASYN7
STASYN8
STASYN9
STASYN10
STASYN11
STASYN12

{WR3 has been set up for the number of bits per character. Store this value wherever we want to disable CRC.}
LDARxWR3
ORIRxEnable
STADisableRxCRC1
STADisableRxCRC2
STADisableRxCRC3

{OR in RxCRCEnable and store this value wherever we want to enable the CRC generator.}
ORIRxCRCEnable
STAEnableRxCRC1
STAEnableRxCRC2
STAEnableRxCRC3
STAEnableRxCRC4

{OR in the SyncCharacterLoadInhibit bit and the EnterHuntMode bit. This is the initial state of the receiver.}
LDARxWR3
ORIRxEnable+SyncCharacterLoadInhibit+EnterHuntPhase
STAEnterHuntMode1
STAEnterHuntMode2

{Initialize the values for the one second timer.}
LXIH,BisyncTimerTable
LDACurrentBaudRate
CALLHLPlus2A
MOVA,M
STAOneSecondTimerLow
INXH
MOVA,M
STAOneSecondTimerHigh

{Set up the SIO chip. The order is important. Any deviation from this may cause the chip to do weird things.}
DI
MVIA,ChannelReset
OUTRxCont

MVIA,PointToWR4
OUTRxCont
LDARxWR4
OUTRxCont

MVIA,PointToWR5+ResetExternalStatusInterrupts
OUTRxCont
LDARxWR5
OUTRxCont

MVIA,PointToWR3
OUTRxCont
LDARxWR3
ORIEnterHuntPhase+SyncCharacterLoadInhibit
OUTRxCont

MVIA,PointToWR6
OUTRxCont
LDACurrentSyncCharacter
OUTRxCont

MVIA,PointToWR7
OUTRxCont
LDACurrentSyncCharacter
OUTRxCont

MVIA,PointToWR1+ResetExternalStatusInterrupts
OUTRxCont
LDARxWR1
OUTRxCont

MVIA,ChannelReset
OUTTxCont

MVIA,PointToWR4
OUTTxCont
LDATxWR4
OUTTxCont

MVIA,PointToWR6
OUTTxCont
MVIA,Filler
OUTTxCont

MVIA,PointToWR7+ResetExternalStatusInterrupts
OUTTxCont
MVIA,Filler
OUTTxCont

MVIA,PointToWR1+ResetExternalStatusInterrupts
OUTTxCont
LDATxWR1
OUTTxCont

MVIA,PointToWR5
OUTTxCont
LDATxWR5
OUTTxCont

JMPReturnSuccess


InitializeSdlcMode:
LXIH,8000H+RxCont;HL points to Rx Control register
DI
MVIM,ChannelReset

{Set WR6 for the Sdlc sync character}
MVIM,ResetExternalStatusInterrupts+PointToWR6
LDARS232CParameter3
MOVM,A

{Set WR7 to the Sdlc flag character.}
MVIM,ResetExternalStatusInterrupts+PointToWR7
MVIM,7EH

{WR4 has been set up for X1 ClockMode and Sdlc mode.}
MVIM,ResetExternalStatusInterrupts+PointToWR4
LDARxWR4
MOVM,A

{WR3 has been set up for the number of bits per character and CRC Enable.}
MVIM,ResetExternalStatusInterrupts+PointToWR3
LDARxWR3
MOVM,A

{WR1 has been set up for ExternalIntEnable, IntOnAllRxCharacters (status affects parity)}
MVIM,ResetExternalStatusInterrupts+PointToWR1
LDARxWR1
MOVM,A

{Now initialize Channel B, the Tx channel}
LXIH,8000H+TxCont;HL points to TxControl register
MVIM,ChannelReset

{Set WR7 to the Sdlc flag character.}
MVIM,ResetExternalStatusInterrupts+PointToWR7
MVIM,7EH
JMPSetTxWR4


InitializeAsyncMode:
LXIH,8000H+RxCont;HL points to Rx Control register
DI
MVIM,ChannelReset

{WR4 has been set up for X16 ClockMode, the number of stop bits/character, and the parity specified by the client’s parameter record.}
MVIM,ResetExternalStatusInterrupts+PointToWR4
LDARxWR4
MOVM,A

{WR3 has been set up for the number of bits per character}
MVIM,ResetExternalStatusInterrupts+PointToWR3
LDARxWR3
MOVM,A

{WR1 has been set up for ExternalIntEnable, IntOnAllRxCharacters (status affects parity)}
MVIM,ResetExternalStatusInterrupts+PointToWR1
LDARxWR1
MOVM,A

{Now initialize Channel B, the Tx channel}
LXIH,8000H+TxCont;HL points to TxControl register
MVIM,ChannelReset

SetTxWR4:
{WR4 has been set up for X16 ClockMode, the number of stop bits/character, and the parity specified by the client’s parameter record.}
MVIM,ResetExternalStatusInterrupts+PointToWR4
LDATxWR4
MOVM,A

{WR5 has been set up for the number of bits/character, DataTerminalReady (if specified in the client’s parameter record), RequestToSend (if specified in the client’s parameter record).}
MVIM,ResetExternalStatusInterrupts+PointToWR5
LDATxWR5
MOVM,A

{WR1 has been set up for StatusAffectsVector, ExternalIntEnable, TxIntEnable}
MVIM,ResetExternalStatusInterrupts+PointToWR1
LDATxWR1
MOVM,A

ReturnSuccess:
{Return Success in the CSB.}
EI
LXIH,XferSuccess
SHLDRS232CParameter
LXIH,SendParameter
JMPReturnResult
;
DoSetRS366Status:
LDARS232CParameter2; Read New RS366 Status
ANIRS366StatusMask
CALLSetRS366
JMPResetMiscTaskFlag
;
DoGetStatus:
INRS366Reg; Read RS366 Reg Condition
STARS366Buffer
ANIDLO+PND+COS+ACR+PWI
STARS232CDeviceStatusHi;Save RS366 Reg Condition in Device Status

{Get Data Carrier Detect bit from RR0.}
INRxCont
ANIBreakAbort+DCD; Bk ABT is only on Async Mode
MOVD,A;Save DCD in D

{Get Clear To Send Detect bit from RR0.}
INTxCont
ANICTS
ORAD
MOVD,A;Save DCD and CTS in D

{Get DataSetReady bit from RS366Buffer.}
DBopMVIA;A ← RS366Buffer
RS366Buffer:
DB0
ANIDSRdy; Data Set Ready?
JZCheckRingIndicator
MVIA,DataSetReady; IF Yes, DataSetReady bit Set
ORAD
MOVD,A;Save DataSetReady, DCD and CTS in D

CheckRingIndicator:
{Get RingIndicator from RS366Buffer.}
LDARS366Buffer
ANIRing; Ring Heard?
JZCheckRingHeardLatch
MVIA,RingIndicator; If Yes, Ring Indicator bit Set
ORAD
MOVD,A
STARingHeardLatch; Set RingHeard Latch

CheckRingHeardLatch:
DBopMVIA;A ← RingHeardLatch
RingHeardLatch:
DB0
ORAA
JZWriteDeviceStatus
MVIA,RingHeard; IF Yes, Ring Heard bit set
ORAD
MOVD,A

WriteDeviceStatus:
MOVA,D
STARS232CDeviceStatus
LXIH,SendDeviceStatus

ReturnResult:
CALLWriteCPBuffer
JMPResetMiscTaskFlag
;
DoMinorSetParameters:
LDATxWR5
ANI0FFH-DTR-RTS;Turn off DTR and RTS
MOVD,A;Save TxWR5 in D
LDARS232CParameter2Hi
ANICPDTRMask
JZRTSControl
MOVA,D; Set DTR bit if command bit is 1
ORIDTR
MOVD,A;Save TxWR5 in D

RTSControl:
LDARS232CParameter2Hi; Check Command
ANICPRTSMask
MOVA,D; Set RTS bit if command bit is 1
JZControlSigSet
ORIRTS
ControlSigSet:
CALLUpdateTxWR5
LDATxWR5
LXIH,TxCont+8000H;HL points to TxCont register
DI
MVIM,PointToWR5
MOVM,A;Send new WR5 command
EI

{If ResetRingHeard bit is set, reset the RingHeardLatch.}
CALLCheckResetRingHeard

ResetMiscTaskFlag:
LXIH,ZeroMiscFlag
CALLWriteCPBuffer
JMPMiscYield

SaveMiscResumeAddressAndYield:
SHLDMiscTaskResumeAddress
MiscYield:
DS0
{Pass control to the next task specified in Domino.cfg}

END