[Cyan]<DragonWare0.1>Diagnostics>GenSFCI.mesa!1

GenSFCI.mesa

Edward Fiala February 10, 1986 4:33:18 pm PST

Curry, September 11, 1986 8:20:35 pm PDT

Curry, September 11, 1986 7:17:27 pm PDT Added definition for SetYoungestL

Fiala November 5, 1986 6:07:04 pm PST Cosmetic edits; use SetYoungestStatus rather than SetYoungestL.

Fiala March 25, 1987 3:46:32 pm PST Change Reset, Pause, and Halt for
operation with GenDebugger; move the storage addresses which hold the PC from 3xxx to 1773xxx to lie within the megabyte covered by GenDebugger; provide different set of PC's for withSoftCard = TRUE and FALSE.

Load with "quad -cx GenDebugger GenSFCI". This diagnostic tests the SFCI opcode. When correctly executed with withSoftCard = TRUE, it terminates with a Halt[177777B] on instruction 102, cycle 535, PC = 7770172B.

DIRECTORY

Basics USING [DoubleShiftLeft],

DebuggerDefs,

DragOpsCross USING [],
--Word, wordsPerPage, bytesPerWord, charsPerWord, bitsPerByte, bitsPerCharacter, bitsPerWord, bytesPerPage, logWordsPerPage, logBitsPerByte, logBitsPerChar, logBytesPerWord, logCharsPerWord, logBitsPerWord, logBytesPerPage, PageCount, PageNumber, maxPagesInVM, SixBitIndex, FiveBitIndex, TwoWords, FourBitIndex, Half, ThreeBitIndex, FourHalves, TwoHalves, Byte, ZerosByte, OnesByte, EightBytes, FourBytes, ByteIndex, BytesPerWord, TwoBytes, Comparison, ByteAddress, WordAddress, FieldDescriptor, RegIndex, PadByte, Lit8, Op4, Op8, JDist8, Inst, OIFormat, OQBformat, LRformat, QRformat, ShortRegQR, OBformat, LRBformat, RRformat, ODBformat, LRRBformat, RJBformat, ShortRegRJB, JBBformat, TrapWidthWords, TrapWidthBytes, XopBase, TrapBase, KernalLimit, TrapIndex, StackUnderflowTrap, IFUPageFaultTrap, ResetTrap, IFUStackOverflowTrap, EUStackOverflowTrap, RescheduleTrap, ALUCondFalse, ALUCondEZ, ALUCondLZ, ALUCondLE, ALUCondSpare, ALUCondNE, ALUCondGE, ALUCondGZ, ALUCondOver, ALUCondBC, ALUCondIL, ALUCondDO, ALUCondNotOver, ALUCondNB, ALUCondNI, ModeFault, MemAccessFault, IOAccessFault, EUPageFault, EUWriteFault, AUFault, euStack, euJunk, euToKBus, euMAR, euField, euConstant, euAux, euBogus, euLast, ifuYoungestL, ifuYoungestPC, ifuEldestL, ifuEldestPC, ifuSLimit, ifuBogus, ifuL, ifuS, ifuPC, ifuLast, EURegs, EULegalRegs, IFURegs, IFULegalRegs, StackedStatusWord, IFUStackIndex, IFUStackSize, IFUOverflow, EUStackIndex, EUStackSize, EULocalIndex, EULocals, EUAuxIndex, EUAuxRegs, EUConstIndex, EUConstants, IOLocation, ioRescheduleRequest, ioResetRequest, IOOperand, PCmdFormat, PCmdByteSelect, PCmdClass, PCmdSpace, PCmdDirection

DragOpsCrossUtils USING [CardToWord],
--InstToBytes, InstToFormat, BytePCToWordAddress, WordAddressToBytePC, IOOperandToCard, CardToIOOperand, FieldDescriptorToCard, CardToFieldDescriptor, BytesToWord, BytesToHalf, WordToBytes, HalfToBytes, HalvesToWord, WordToHalves, HighHalf, LowHalf, LeftHalf, RightHalf, SwapHalves, WordToInt, IntToWord, WordToCard, HalfToCard, ByteToCard, CardToWord, CardToHalf, CardToByte, DragAnd, DragOr, DragXor, DragNot, VanillaAdd, VanillaSub, AddDelta, HalfNot, HalfAnd, HalfOr, HalfXor, HalfShift, DoubleWordShiftLeft, SingleWordShiftLeft, SingleWordShiftRight, XopToBytePC, TrapIndexToBytePC, FieldUnit

HandCoding, --Has opcode and register defs.

HandCodingPseudos, --Label, SetLabel, GenLabel, GenLabelHere, UseLabel8A, UseLabel8B, UseLabel16, UseLabel32, LReg, PReg, SReg, AddReg, SubReg, SetRegConst, MoveReg, MoveRegI, LRegI, IndexedJump, ProcedureEntry, ProcedureExit, SetupField, ExtractField, ShiftLeft, LoadProcessorReg, StoreProcessorReg, CauseReschedule, CauseReset, GetSPLimit, SetSPLimit, GetYoungestPC, GetYoungestStatus, GetEldestPC, GetEldestStatus, SetYoungestPC, SetYoungestStatus, SetEldestPC, SetEldestStatus, Pause, Halt

HandCodingSupport; --Area, GetProc, PutProc, ProcList, NewArea, GenWithArea, Gen1WithArea, ForceOut, GetCurrentArea, LoadArea, GetOutputPC, SetOutputPC, WordAlign, ReserveData, OutputByte, OutputOneByte, OutputAlphaBeta, OutputAlphaBetaGammaDelta, OutputWord

GenSFCI: CEDAR PROGRAM

IMPORTS Basics, DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport

= BEGIN OPEN DebuggerDefs, DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport;

All: PROC = {

area: Area = GetCurrentArea[];

Lizard requires that all storage touched by a program be declared in advance. This procedure declares a word that will be touched and initializes its value.

InitializeWord: PROC [pc, value: CARD] = {

oldPC: LONG CARDINAL = GetOutputPC[area];

bytePC: LONG CARDINAL ← Basics.DoubleShiftLeft[[lc[pc]], 2].lc;

SetOutputPC[bytePC]; --pc is a byte address

OutputWord[area, CardToWord[value], FALSE];

SetOutputPC[oldPC];

};

GenSFCI: PROC = {

DoSFCI initializes memLoc to hold a PC, pushes memLoc onto the stack, executes an SFCI opcode, and changes the PC to be the destination PC. Each call to DoSFCI will push another memLoc onto the stack; later accumulated stack values are checked and popped. When a RETN is eventually executed, ADDB[1] at each SFCI return point count to verify that control really passed through the different procedure return points.

DoSFCI: PROC [destPC, memLoc: LONG CARDINAL] ~ {

InitializeWord[memLoc, destPC];

drLIQB[CardToWord[memLoc]];

drSFCI[];

drADDB[1];

drRETN[];

SetOutputPC[destPC];

};

enterSFCITestPC: LONG CARDINAL = 1774000B * bytesPerWord;

firstJumpPC: LONG CARDINAL = IF withSoftCard THEN 5000000B ELSE 400100B;

endTestPC: LONG CARDINAL = 1776000B * bytesPerWord;

okSFCI: Label = GenLabel[];

okStk: Label = GenLabel[];

badStk: Label = GenLabel[];

endTest: Label = GenLabel[];

exitTest: Label = GenLabel[];

drJQB[CardToWord[enterSFCITestPC]];

SetOutputPC[enterSFCITestPC];

Exercise every bit position of the pc address; must avoid the vector for Xops and Traps and the debugger in byte positions [4000000B..4040000B).

drLIB[0]; --Counter used to verify that the calls and returns have occurred.

InitializeWord[1772777B, firstJumpPC];

drLIQB[CardToWord[1772777B]];

drSFCI[];

drJEBBJ[16B, UseLabel8B[okSFCI]]; Pause[]; SetLabel[okSFCI];

drJQB[UseLabel32[exitTest]];

SetOutputPC[firstJumpPC];

IF withSoftCard THEN { --1 megabyte limit confines PC to [4,000,000B..10,000,000B) and storage references to [1,000,000B..2,000,000B).

DoSFCI[ 5010020B, 1773000B]; --SFCI does push 1773000B, [s] = 16B after the RETN

DoSFCI[ 5020040B, 1773001B]; --SFCI does push 1773001B, [s] = 15B after the RETN

DoSFCI[ 5040100B, 1773002B]; --SFCI does push 1773002B, [s] = 14B after the RETN

DoSFCI[ 5100200B, 1773003B]; --SFCI does push 1773003B, [s] = 13B after the RETN

DoSFCI[ 5200400B, 1773004B]; --SFCI does push 1773004B, [s] = 12B after the RETN

DoSFCI[ 5401000B, 1773005B]; --SFCI does push 1773005B, [s] = 11B after the RETN

DoSFCI[ 6002000B, 1773006B]; --SFCI does push 1773006B, [s] = 10B after the RETN

DoSFCI[ 6004001B, 1773007B]; --SFCI does push 1773007B, [s] = 07B after the RETN

DoSFCI[ 4060002B, 1773010B]; --SFCI does push 1773010B, [s] = 06B after the RETN

DoSFCI[ 4070004B, 1773011B]; --SFCI does push 1773011B, [s] = 05B after the RETN

DoSFCI[ 4100010B, 1773012B]; --SFCI does push 1773012B, [s] = 04B after the RETN

DoSFCI[ 4200020B, 1773013B]; --SFCI does push 1773013B, [s] = 03B after the RETN

DoSFCI[ 4400040B, 1773014B]; --SFCI does push 1773014B, [s] = 02B after the RETN

DoSFCI[ 4677777B, 1773015B]; --SFCI does push 1773015B, [s] = 01B after the RETN

}

ELSE {

DoSFCI[ 1000200B, 1773000B]; --SFCI does push 1773000B, [s] = 16B after the RETN

DoSFCI[ 2000400B, 1773001B]; --SFCI does push 1773001B, [s] = 15B after the RETN

DoSFCI[ 4010000B, 1773002B]; --SFCI does push 1773002B, [s] = 14B after the RETN

DoSFCI[ 10002000B, 1773003B]; --SFCI does push 1773003B, [s] = 13B after the RETN

DoSFCI[ 20004001B, 1773004B]; --SFCI does push 1773004B, [s] = 12B after the RETN

DoSFCI[ 40001002B, 1773005B]; --SFCI does push 1773005B, [s] = 11B after the RETN

DoSFCI[ 100020004B, 1773006B]; --SFCI does push 1773006B, [s] = 10B after the RETN

DoSFCI[ 200040010B, 1773007B]; --SFCI does push 1773007B, [s] = 07B after the RETN

DoSFCI[ 400100020B, 1773010B]; --SFCI does push 1773010B, [s] = 06B after the RETN

DoSFCI[ 1000000000B, 1773011B]; --SFCI does push 1773011B, [s] = 05B after the RETN

DoSFCI[ 2000000000B, 1773012B]; --SFCI does push 1773012B, [s] = 04B after the RETN

DoSFCI[20000200040B, 1773013B]; --SFCI does push 1773013B, [s] = 03B after the RETN

DoSFCI[10000000000B, 1773014B]; --SFCI does push 1773014B, [s] = 02B after the RETN

DoSFCI[ 4000000000B, 1773015B]; --SFCI does push 1773015B, [s] = 01B after the RETN

};

A Lizard bug prevents defining Labels at addresses with the high-order bit = 1.

drJQB[UseLabel32[endTest]];

SetOutputPC[endTestPC];

SetLabel[endTest];

drLIQB[CardToWord[1773015B]];

drRJEBJ[popSrc, belowSrcPop, UseLabel8B[okStk]];

SetLabel[badStk]; Pause[]; SetLabel[okStk];

drLIQB[CardToWord[1773014B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773013B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773012B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773011B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773010B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773007B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773006B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773005B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773004B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773003B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773002B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773001B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1773000B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drLIQB[CardToWord[1772777B]]; drRJNEB[popSrc, belowSrcPop, UseLabel8B[badStk]];

drRETN[];

SetLabel[exitTest];

};

Begin at PC = userBasePC = 1010000B * 4, L = 1, S = 0 as established in GenDebugger.

GenSFCI[];

Halt[177777B]; --Terminate here at the end of the program

};

END.