<> <> < Fault 1 to 2 MByte => Mapped into the 1 MByte of real memory 2 to 64 MByte => Fault Increment a counter on reschedule and return. Enter the debugger on IOAccessFault and IFUPageFaultTrap. Used the withSoftCard BOOLEAN appropriately on Cuenod's code. withSoftCard must now be TRUE for the Softcard and FALSE for Lizard.>> <<>> <> <<>> <> <<>> <> DIRECTORY DebuggerDefs, DragOpsCross USING [TrapBase, TrapWidthBytes, TrapIndex, XopBase], --Word, wordsPerPage, bytesPerWord, charsPerWord, bitsPerByte, bitsPerCharacter, bitsPerWord, bytesPerPage, logWordsPerPage, logBitsPerByte, logBitsPerChar, logBytesPerWord, logCharsPerWord, logBitsPerWord, logBytesPerPage, PageCount, PageNumber, maxPagesInVM, SixBitIndex, FiveBitIndex, TwoWords, FourBitIndex, Half, ThreeBitIndex, FourHalves, TwoHalves, Byte, ZerosByte, OnesByte, EightBytes, FourBytes, ByteIndex, BytesPerWord, TwoBytes, Comparison, ByteAddress, WordAddress, FieldDescriptor, RegIndex, PadByte, Lit8, Op4, Op8, JDist8, Inst, OIFormat, OQBformat, LRformat, QRformat, ShortRegQR, OBformat, LRBformat, RRformat, ODBformat, LRRBformat, RJBformat, ShortRegRJB, JBBformat, TrapWidthWords, TrapWidthBytes, XopBase, TrapBase, KernalLimit, TrapIndex, StackUnderflowTrap, IFUPageFaultTrap, ResetTrap, IFUStackOverflowTrap, EUStackOverflowTrap, RescheduleTrap, ALUCondFalse, ALUCondEZ, ALUCondLZ, ALUCondLE, ALUCondSpare, ALUCondNE, ALUCondGE, ALUCondGZ, ALUCondOver, ALUCondBC, ALUCondIL, ALUCondDO, ALUCondNotOver, ALUCondNB, ALUCondNI, ModeFault, MemAccessFault, IOAccessFault, MapFault, AUFault, DynaBusTimeOut, DynaBusOtherFault, euStack, euJunk, euToKBus, euMAR, euField, euConstant, euAux, euBogus, euLast, ifuYoungestL, ifuYoungestPC, ifuEldestL, ifuEldestPC, ifuSLimit, ifuBogus, ifuL, ifuS, ifuPC, ifuLast, EURegs, EULegalRegs, IFURegs, IFULegalRegs, StackedStatusWord, IFUStackIndex, IFUStackSize, IFUOverflow, EUStackIndex, EUStackSize, EULocalIndex, EULocals, EUAuxIndex, EUAuxRegs, EUConstIndex, EUConstants, IOLocation, ioRescheduleRequest, ioResetRequest, IOOperand, PCmdFormat, PCmdByteSelect, PCmdClass, PCmdSpace, PCmdDirection DragOpsCrossUtils USING [CardToWord], --InstToBytes, InstToFormat, BytePCToWordAddress, WordAddressToBytePC, IOOperandToCard, CardToIOOperand, FieldDescriptorToCard, CardToFieldDescriptor, BytesToWord, BytesToHalf, WordToBytes, HalfToBytes, HalvesToWord, WordToHalves, HighHalf, LowHalf, LeftHalf, RightHalf, SwapHalves, WordToInt, IntToWord, WordToCard, HalfToCard, ByteToCard, CardToWord, CardToHalf, CardToByte, DragAnd, DragOr, DragXor, DragNot, VanillaAdd, VanillaSub, AddDelta, HalfNot, HalfAnd, HalfOr, HalfXor, HalfShift, DoubleWordShiftLeft, SingleWordShiftLeft, SingleWordShiftRight, XopToBytePC, TrapIndexToBytePC, FieldUnit HandCoding, --Has opcode and register defs. HandCodingPseudos, --Label, SetLabel, GenLabel, GenLabelHere, UseLabel8A, UseLabel8B, UseLabel16, UseLabel32, LReg, PReg, SReg, AddReg, SubReg, SetRegConst, MoveReg, MoveRegI, LRegI, IndexedJump, ProcedureEntry, ProcedureExit, SetupField, ExtractField, ShiftLeft, LoadProcessorReg, StoreProcessorReg, CauseReschedule, CauseReset, GetSPLimit, SetSPLimit, GetYoungestPC, GetYoungestStatus, GetEldestPC, GetEldestStatus, SetYoungestPC, SetYoungestStatus, SetEldestPC, SetEldestStatus, Pause, Halt HandCodingSupport, --Area, GetProc, PutProc, ProcList, NewArea, GenWithArea, Gen1WithArea, ForceOut, GetCurrentArea, LoadArea, GetOutputPC, SetOutputPC, WordAlign, ReserveData, OutputByte, OutputOneByte, OutputAlphaBeta, OutputAlphaBetaGammaDelta, OutputWord SoftcardPrivate USING [Car1PeriodicIntToDragon, CarVirtualMemAccessEU, CarVirtualMemAccessIFU, DragonMapAddr, SCBaseAddr]; GenDebugger: CEDAR PROGRAM IMPORTS DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport = BEGIN OPEN DebuggerDefs, DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport; TrapWidthBytes: NAT = DragOpsCross.TrapWidthBytes; All: PROC = { <> debugDebugger: BOOLEAN = FALSE; debuggerCacheClearAddr: LONG CARDINAL = (debuggerBasePC / bytesPerWord) + 10000B; area: Area = GetCurrentArea[]; Start: Label = GenLabel[]; enterDebug: Label = GenLabel[]; enterReschedule: Label = GenLabel[]; <> FillTrap: PROC [tx: DragOpsCross.TrapIndex, dest: Label] = { SetOutputPC[LOOPHOLE[tx, CARDINAL] * TrapWidthBytes + DragOpsCross.TrapBase * bytesPerWord]; drJQB[UseLabel32[dest]]; }; <> GenDebug: PROC = { readS: Label = GenLabel[]; setL: Label = GenLabel[]; noMoreFrames: Label = GenLabel[]; wait: Label = GenLabel[]; SetOutputPC[debuggerBasePC]; SetLabel[enterDebug]; drALS[0]; --L _ S equals the value of S at the onset of the entry Xop + 1. drLIQB[CardToWord[debugBase]]; drWB[debuggerOpcode]; --Save opcode number <> drLIQB[CardToWord[debugBase]]; <> <<>> <> drRADD[pushDst, const0, const0]; drSRIn[reg0, debuggerCarry]; <> GetYoungestPC[]; --Youngest PC into LR1 FOR reg: CARDINAL IN [0..IFUStackSize) DO moreFrames: Label _ GenLabel[]; GetEldestStatus[]; drSRIn[reg0, ifuRegBase + reg + reg]; GetEldestPC[]; --Recover the PC of the old frame drRJNEBJ[topSrc, reg1, UseLabel8B[moreFrames]]; drSRIn[reg0, ifuRegBase + reg + reg + 1]; drLIB[reg]; drJDB[UseLabel16[noMoreFrames]]; SetLabel[moreFrames]; drSRIn[reg0, ifuRegBase + reg + reg + 1]; ENDLOOP; drLIB[IFUStackSize]; --Shouldn't ever get here SetLabel[noMoreFrames]; drSRIn[reg0, debuggerFrame]; --No. frames including the one created by Halt. drDIS[]; --Pop the youngest PC off the stack. <> drLFC[UseLabel16[readS]]; drSUBB[1]; drSRIn[reg0, debuggerS]; GetSPLimit[]; drSRIn[reg0, debuggerSLimit]; --ifuSLimit <> drAS[377B]; --Point S at the entry underneath debugBase FOR reg: CARDINAL IN [0..EUStackSize - 1) DO drSRIn[reg0, euRegBase + EUStackSize - 2 - reg]; --Save the EU stack ENDLOOP; <> FOR reg: CARDINAL IN [131..160) DO --EU registers except stack drLIP[reg]; drSRIn[reg0, euRegBase + reg]; ENDLOOP; <> drLIB[1]; drSRIn[reg0, debuggerProceed]; --Indicate "stopped" SetLabel[wait]; IF NOT debugDebugger THEN { <> drLIQB[CardToWord[debugBase + debuggerProceed + 10000B]]; drRB[0]; drDIS[]; --Clear cache drLIQB[CardToWord[debugBase + debuggerProceed]]; drRB[0]; drRJNEBJ[popSrc, const0, UseLabel8B[wait]]; }; <> drLRIn[reg0, debuggerS]; drADDB[1]; drLFC[UseLabel16[setL]]; drASL[377B]; drLIQB[CardToWord[debugBase]]; <> drLRIn[reg0, debuggerFrame]; --reg1 _ last frame to reload; FOR reg: CARDINAL _ IFUStackSize - 1, reg - 1 DO notYet: Label _ GenLabel[]; drLIB[reg]; drRJGB[popSrc, belowSrc, UseLabel8B[notYet]]; drLRIn[reg0, ifuRegBase + reg + reg + 1]; SetEldestPC[]; drLRIn[reg0, ifuRegBase + reg + reg]; SetEldestStatus[]; SetLabel[notYet]; IF reg = 0 THEN EXIT; ENDLOOP; drAS[377B]; drLRIn[reg0, debuggerSLimit]; SetSPLimit[]; drLRIn[reg0, debuggerCarry]; drLIQB[CardToWord[37777777777B]]; drRUADD[belowDst, popSrc, belowSrcPop]; --Reload Carry drLRIn[reg0, euRegBase + 131]; drSIP[131]; --Reload euField FOR reg: CARDINAL IN [133..160) DO --Reload constants except const0 and aux registers drLRIn[reg0, euRegBase + reg]; drSIP[reg]; ENDLOOP; <> FOR reg: CARDINAL IN [0..EUStackSize) DO drLRIn[reg0, euRegBase + reg]; ENDLOOP; <> drRET[377B]; <> WordAlign[area]; SetLabel[readS]; GetYoungestStatus[]; drLIB[377B]; drAND[]; drDUP[]; SetYoungestStatus[]; drRETN[]; WordAlign[area]; SetLabel[setL]; SetYoungestStatus[]; drRETN[]; }; <> XPause: PROC = { HandCodingSupport.OutputByte[HandCodingSupport.GetCurrentArea[], LOOPHOLE[1]]; }; GenReschedule: PROC = { SetLabel[enterReschedule]; --Jump here on Reschedule drRUADD[pushDst, const0, const0]; --Save carry on the stack drLIQB[CardToWord[40500h]]; drRSB[0]; drADDB[1]; --Increment location 40500h on each reschedule drWB[0]; drLIQB[CardToWord[80000000h+(SoftcardPrivate.Car1PeriodicIntToDragon-SoftcardPrivate.SCBaseAddr)/2]]; --Clear periodic interrupt drRSB[0]; drDIS[]; drRB[1]; drDIS[]; drLIQB[CardToWord[0FFFFFFFFh]]; drRUADD[topDst, popSrc, belowSrc]; -- Restore carry drDIS[]; drRETN[]; }; <> GenReset: PROC = { fixL: Label = GenLabel[]; loop1: Label = GenLabel[]; loop2: Label = GenLabel[]; WordAlign[area]; SetLabel[Start]; --Softcard comes here on Reset. --drLIQB[CardToWord[debugBase]]; --drLC0[]; --drWSB[debuggerLoopCount]; IF withSoftCard THEN { drLIQB[CardToWord[80000000h+(SoftcardPrivate.DragonMapAddr-SoftcardPrivate.SCBaseAddr)/2]]; --Base of the map in R0 drLIQB[CardToWord[4000h]]; --loop count in R1 SetLabel[loop1]; drLIQB[CardToWord[8000h]]; --Page fault in R2 drLRn[reg0]; --Address in R3 drWB[0]; -- (R3)^ _ R2 drRADD[reg0, reg0, const1]; -- increment address drSUBB[1]; -- decrements loop count drRJNEBJ[topSrc, const0, UseLabel8B[loop1]]; drAS[376B]; --pop 2 <> drLIQB[CardToWord[80000000h+100h+(SoftcardPrivate.DragonMapAddr-SoftcardPrivate.SCBaseAddr)/2]]; -- Map address of VM = 1Meg in R0 drLIQB[CardToWord[0h]]; -- Physical address in R1 drLIQB[CardToWord[100h]]; -- loop count in R2 SetLabel[loop2]; drLRn[reg1]; -- Physical address in R3 drLRn[reg0]; -- Address in R4 drWB[0]; -- (R4)^ _ R3 drRADD[reg0, reg0, const1]; -- increment address drRADD[reg1, reg1, const1]; -- increment Physical address drSUBB[1]; -- decrements loop count drRJNEBJ[topSrc, const0 ,UseLabel8B[loop2]]; drAS[375B]; --pop 3 <> <<>> drLIQB[CardToWord[80000000h+(SoftcardPrivate.CarVirtualMemAccessIFU-SoftcardPrivate.SCBaseAddr+2)/2]]; -- A read at this location set virtual access drRB[0]; drDIS[]; <> drLIQB[CardToWord[80000000h+(SoftcardPrivate.CarVirtualMemAccessEU-SoftcardPrivate.SCBaseAddr+2)/2]]; -- A read at this location set virtual access drRB[0]; drDIS[]; } ELSE IF debugDebugger THEN { <> FOR I: CARDINAL IN [0..EUStackSize) DO drLC0[]; --Initialize the stack ENDLOOP; drSIP[130]; --euMAR drSIP[131]; --euField SetSPLimit[]; --ifuSLimit FOR I: CARDINAL IN [4..12+16) DO drSIP[132 + I]; --Initialize the constants (except 0 to 3) and aux regs ENDLOOP; }; drLIB[1]; drLFC[UseLabel16[fixL]]; drASL[377B]; --S _ 0 drJQB[CardToWord[userBasePC]]; WordAlign[area]; SetLabel[fixL]; SetYoungestStatus[]; <> --drLIB[128-16-1]; --SetSPLimit[]; drRETN[]; --L _ 1 in caller's frame SetOutputPC[userBasePC]; <> }; <> --GenTest: PROC = { --drLFC[3]; --drLIB[33]; drLIB[133]; Pause[]; --drLFC[3]; --drLIB[44]; drLIB[144]; Pause[]; --drLFC[3]; --drLIB[55]; drLIB[155]; Pause[]; --drLFC[3]; --drLIB[66]; drLIB[166]; Pause[]; --Halt[177777B]; --}; <> <> SetOutputPC[0 * TrapWidthBytes + DragOpsCross.XopBase * bytesPerWord]; drLIQB[CardToWord[debugBase]]; drLIP[130]; drWSB[euRegBase + 130]; --euMAR drLC0[]; --Opcode number of Pause[]; drJDB[UseLabel16[enterDebug]]; <> SetOutputPC[377B * TrapWidthBytes + DragOpsCross.XopBase * bytesPerWord]; <> drLIQB[CardToWord[debugBase]]; drLIP[130]; drPSB[euRegBase + 130]; --euMAR drWB[debuggerAlphaBeta]; drLIB[377B]; --Opcode number of Halt[ab]; drJDB[UseLabel16[enterDebug]]; <> SetOutputPC[LOOPHOLE[DragOpsCross.TrapIndex.IOAccessFault, CARDINAL] * TrapWidthBytes + DragOpsCross.TrapBase * bytesPerWord]; drLIQB[CardToWord[debugBase]]; drLIP[130]; drWSB[euRegBase + 130]; drLIB[debugEntryEUFault]; drJDB[UseLabel16[enterDebug]]; <> SetOutputPC[LOOPHOLE[DragOpsCross.TrapIndex.IFUPageFaultTrap, CARDINAL] * TrapWidthBytes + DragOpsCross.TrapBase * bytesPerWord]; drLIQB[CardToWord[debugBase]]; drLIP[130]; drWSB[euRegBase + 130]; drLIB[debugEntryIFUFault]; drJDB[UseLabel16[enterDebug]]; FillTrap[ResetTrap, Start]; FillTrap[RescheduleTrap, enterReschedule]; GenReschedule[]; GenDebug[]; GenReset[]; --GenTest[]; <> }; END.