LichenImplNaming.Mesa
Last tweaked by Mike Spreitzer on May 6, 1988 10:29:30 am PDT
DIRECTORY AbSets, BiRels, Convert, LichenDataOps, LichenDataStructure, Rope, SetBasics;
LichenImplNaming:
CEDAR
PROGRAM
IMPORTS AbSets, BiRels, Convert, LichenDataOps, LichenDataStructure, Rope, SetBasics
EXPORTS LichenDataOps
=
BEGIN OPEN Sets:AbSets, LichenDataStructure, LichenDataOps;
PrefixifyDesign:
PUBLIC
PROC [design: Design] ~ {
design.cellTypes.EnumA[PrefixifyCellType];
RETURN};
noIntPart: INT ~ -1;
fixSet: Set--{noIntPart, 1}-- ~ Sets.CreateList[vals: LIST[IV[noIntPart], IV[1]], space: SetBasics.ints, mutability: constant, order: Sets.fwd];
PrefixifyCellType:
PROC [cta:
REF
ANY] ~ {
ct: CellType ~ NARROW[cta];
IF ct.asu#
NIL
THEN {
d: Design ~ ct.d;
parsed: BiRel--ROPE INT-- ~ BiRels.GenCreate[spaces: [SetBasics.ropes[TRUE], SetBasics.ints], mappable: [TRUE, FALSE], hints: [[fn: [$Hash], set: [$Vector]], []]];
FixWire:
PROC [w: Wire, prefix:
ROPE, dotPos:
INT] ~ {
subscripts: Set--of INT-- ~ parsed.MappingA[prefix];
newName: ROPE ~ prefix.Replace[start: dotPos, len: 0, with: ".0"];
IF NOT subscripts.Equal[fixSet] THEN ERROR;
ForgetVertexName[d, w, LSn[LIST[prefix]]];
KnowVertexName[d, w, LSn[LIST[newName]]];
RETURN};
NoteNaming:
PROC [pair: BiRels.Pair] ~ {
w: Wire ~ NARROW[pair[left].VA];
sn: SteppyName ~ VSn[pair[right]];
name: ROPE ~ NARROW[sn.steps.first];
namelen: INT ~ name.Length[];
dotPos: INT ← -1;
sepPos: INT ← namelen;
IF sn.steps.rest#NIL THEN ERROR;
FOR idx:
INT
DECREASING
IN [0 .. namelen)
DO
SELECT name.InlineFetch[idx]
FROM
'← => sepPos ← idx;
'. => {dotPos ← idx; EXIT};
ENDCASE => NULL;
ENDLOOP;
IF dotPos>=0
THEN {
prefix: ROPE ~ name.Replace[start: dotPos, len: sepPos-dotPos, with: NIL];
intPart: INT ~ Convert.IntFromRope[name.Substr[dotPos+1, sepPos-dotPos-1]];
IF intPart<0 THEN ERROR;
IF prefix.Length[]=0 THEN ERROR;
[] ← parsed.AddPair[[AV[prefix], IV[intPart]]];
IF parsed.HasPair[[AV[prefix], IV[noIntPart]]] THEN FixWire[FetchWire[ct, OSn[prefix]], prefix, dotPos];
RETURN}
ELSE {
fix: BOOL ~ parsed.HasMapA[name];
[] ← parsed.AddPair[[AV[name], IV[noIntPart]]];
IF fix THEN FixWire[w, name, sepPos];
RETURN};
};
ct.fullName[w].Enumerate[NoteNaming];
RETURN};
RETURN};
InheritNames:
PUBLIC
PROC [design: Design] ~ {
Subject: TYPE ~ REF ANY --actuall, UNION [Vertex, Port, CellType]--;
inherited: Set--of CellType-- ~ Sets.CreateHashSet[design.eSpace];
WorkToCT: PROC [cta: REF ANY] ~ {Ensure[NARROW[cta]]; RETURN};
Ensure:
PROC [ct: CellType] ~ {
InheritFromCI:
PROC [civ: Sets.Value] ~ {
ci: CellInstance ~ NARROW[civ.VA];
ict: CellType ~ design.CiT[ci];
ciNames: Set--of SteppyName-- ~ ct.INames[ci];
InheritAlongConnection:
PROC [porta, wirea:
REF
ANY] ~ {
port: Port ~ NARROW[porta];
wire: Wire ~ NARROW[wirea];
portNames: Set ~ ict.PNames[port];
KnowVertexNames[design, wire, ActualNames[ciNames, portNames]];
RETURN};
IF ict.asTrans#NIL THEN RETURN;
Ensure[ict];
ci.conns.EnumAA[InheritAlongConnection];
RETURN};
UnorganizedInheritToPort:
PROC [portv: Sets.Value] ~ {
port: Port ~ NARROW[portv.VA];
wire: Wire ~ ConndWire[ct, port];
IF wire#NIL THEN KnowPortNames[design, port, ct.WNames[wire]];
RETURN};
IF NOT inherited.AddA[ct] THEN RETURN;
IF ct.inheritNames THEN ERROR;
ct.inheritNames ← TRUE;
IF ct.asu#
NIL
THEN {
design.cct[i].EnumerateMapping[AV[ct], InheritFromCI, rightToLeft];
design.cct[p].EnumerateMapping[AV[ct], UnorganizedInheritToPort, rightToLeft];
RETURN}
ELSE
IF ct.asArray#
NIL
THEN {
a: Array ~ ct.asArray;
ect: CellType ~ ct.EltType[];
ArrayInheritToPort:
PROC [pair: BiRels.Pair] ~ {
ap: Port ~ NARROW[pair[left].VA];
pai: PortAtIndex ~ VPai[pair[right]];
idx: SteppyName ~ AIName[ct, pai.ai];
portNames: Set ~ ect.PNames[pai.port];
names: Set ~ ActualNames[OneSteppy[idx], portNames];
KnowPortNames[design, ap, names];
RETURN};
Ensure[ect];
a.statrep.apToPAI.Enumerate[ArrayInheritToPort];
RETURN};
RETURN};
design.cellTypes.EnumA[WorkToCT];
RETURN};
END.