[
design: Design,
fromAncestorCT, toAncestorCT: CellType,
eltConnections: BiRel--port of fromAncestorCT port of toAncestorCT--,
doomedFromPorts: Set--of port of fromAncestorCT--,
eltTPToWire: Mapper--port of toAncestorCT b prototypical wire--,
subTail: ROPE--to append to name of from array--,
pairs: OneToOne--instance of ancestor of from é instance of ancestor of to--
SplitArray:
PROC [fromArrayCT: CellType] ~ {
fa: Array ~ fromArrayCT.asArray;
faName: ROPE ~ NARROW[Asserting.FnVal[nameReln, fromArrayCT.otherPublic]];
taName: ROPE ~ faName.Cat[subTail];
toArrayCT: CellType ~ CreateArray[design, taName, NIL, toAncestorCT, fa.size, fa.jointsPeriod, GetBorders[fa], NIL, NIL];
ta: Array ~ toArrayCT.asArray;
toNewGroup: Mapper--group of fa b group of ta-- ~ CreateHashMapper[];
toNewTie: Mapper--tie of ta b tie of fa-- ~ CreateHashMapper[];
arrayConnections: BiRel--port of fromArrayCT port of toArrayCT-- ~ CreateHashBiRel[];
arrayTPToWire: Mapper--port of ta b wire-- ~ CreateHashMapper[];
doomedArrayPorts: Set--of port of fa-- ~ CreateHashSet[];
AddConnection:
PROC [fai: ArrayIndex, fg: Group, tai: ArrayIndex, tg: Group] ~ {
IF fg=NIL OR tg=NIL THEN ERROR;
{fp: Port ~ GetArrayPortForGroup[fromArrayCT, fa, fai, fg, TRUE];
tp: Port ~ GetArrayPortForGroup[toArrayCT, ta, tai, tg, TRUE];
w: Wire ~ NARROW[eltTPToWire.Map[tg.ports.first]];
oldFps: Set--of port of fromArrayCT-- ~ arrayConnections.BiRelMap[tp, rightToLeft];
IF fp=NIL OR tp=NIL THEN ERROR;
IF w=NIL THEN ERROR;
SELECT
TRUE
FROM
oldFps.Size[]=0 => IF NOT arrayConnections.AddPair[[fp, tp]] THEN ERROR;
TheElt[oldFps]=fp => NULL;
ENDCASE => ERROR;
[] ← arrayTPToWire.PutMapping[tp, w];
}};
IF IsIncompleteArray[fromArrayCT] THEN ERROR;
IF ta.groupingParmses # fa.groupingParmses THEN ERROR;
{UnroleOldPort: PROC [ra: REF ANY] ~ {UnrolePort[fa, NARROW[ra]]};
doomedFromPorts.Enumerate[UnroleOldPort];
};
FOR gi:
NATURAL
IN [0 .. fa.groupingses.length)
DO
fgs: Groupings ~ NARROW[fa.groupingses[gi]];
tgs: Groupings ~ NARROW[ta.groupingses[gi]];
MoveGroup:
PROC [ra:
REF
ANY] ~ {
fg: Group ~ NARROW[ra];
tg: Group ~ MakeGroup[ta, fg.gi2, tgs];
IF NOT toNewGroup.PutMapping[fg, tg] THEN ERROR;
FOR pl: PortList ← fg.ports, pl.rest
WHILE pl #
NIL
DO
fp: Port ~ NARROW[pl.first];
EnGroup:
PROC [ra:
REF
ANY] ~ {
tp: Port ~ NARROW[ra];
AddPortToGroup[ta, gi, tp, tg, FALSE];
};
eltConnections.EnumerateMapping[fp, leftToRight, EnGroup];
IF doomedFromPorts.HasMember[fp] THEN RemovePortFromGroup[fa, gi, fp, fg];
ENDLOOP;
ra ← ra;
};
fgs.groups.Enumerate[MoveGroup];
ENDLOOP;
{
MoveTie:
PROC [d: Dim, phase: Nat2, jgi:
NATURAL, jgi2: Nat2, j: Joint, tie: Tie] ~ {
fj: Joint ~ j;
ftie: Tie ~ tie;
IF ftie.groups[low]#
NIL
AND ftie.groups[high]#
NIL
THEN {
tj: Joint ~ GetArrayJoint[ta, d, phase];
ttie: Tie ~
NEW [TiePrivate ← [groups: [
low: NARROW[toNewGroup.Map[ftie.groups[low]]],
high: NARROW[toNewGroup.Map[ftie.groups[high]]]]]];
IF ttie.groups[low]=NIL OR ttie.groups[high]=NIL THEN ERROR;
AddTie[tj, jgi, ttie];
IF NOT toNewTie.PutMapping[ftie, ttie] THEN ERROR;
};
};
EnumerateTies[fa, MoveTie];
};
FlushArrayWires[fa, doomedArrayPorts];
{
ConnectGroup:
PROC [domain, range:
REF
ANY] ~ {
fg: Group ~ NARROW[domain];
tg: Group ~ NARROW[range];
IF tg.gi2#fg.gi2 THEN ERROR;
IF tg.ports#
NIL
AND (fg.ports#
NIL
OR fa.toWire.Fetch[fg].val#
NIL)
THEN {
air: Range2 ~ Gi2ToAir[fa, fg.gi2].air;
FOR f:
INT
IN [air[Foo].min .. air[Foo].maxPlusOne)
DO
FOR b:
INT
IN [air[Bar].min .. air[Bar].maxPlusOne)
DO
ai: ArrayIndex ~ [f, b];
IF fg.ports#NIL OR GetArrayPortForGroup[fromArrayCT, fa, ai, fg, FALSE]#NIL THEN AddConnection[ai, fg, ai, tg];
ENDLOOP ENDLOOP;
};
};
toNewGroup.EnumerateMap[ConnectGroup];
};
{
ConnectTie:
PROC [d: Dim, phase: Nat2, jgi:
NATURAL, jgi2: Nat2, j: Joint, tie: Tie] ~ {
ftie: Tie ~ tie;
ttie: Tie ~ NARROW[toNewTie.Map[ftie]];
IF ttie#
NIL
AND ((ttie.groups[low].ports=NIL) # (ttie.groups[high].ports=NIL))
AND ((ttie.groups[low].ports=NIL) # (ftie.groups[low].ports=NIL))
AND ((ttie.groups[high].ports=NIL) # (ftie.groups[high].ports=NIL))
THEN {
o: Dim ~ OtherDim[d];
toHigh: BOOL ~ ttie.groups[low]=NIL;
FOR perp:
NATURAL
IN [0 .. fa.size[o])
DO
FOR para:
NATURAL
IN [0 .. fa.size[d]-1)
DO
lai: ArrayIndex ~ ConsInt2[d, para, perp];
hai: ArrayIndex ~ Int2Tweak[lai, d, 1];
IF toHigh THEN AddConnection[lai, ftie.groups[low], hai, ttie.groups[high]] ELSE AddConnection[lai, ftie.groups[high], hai, ttie.groups[low]];
ENDLOOP ENDLOOP;
};
};
EnumerateTies[fa, ConnectTie];
};
TrimEmptyGroups[fa];
TrimEmptyGroups[ta];
FixArrays[design, fromArrayCT, toArrayCT, arrayConnections, doomedArrayPorts, arrayTPToWire, subTail, pairs];
FixInstances[fromArrayCT, toArrayCT, arrayConnections, doomedArrayPorts, arrayTPToWire, pairs];
{
PerDoomedArrayPort:
PROC [ra:
REF
ANY] ~ {
p: Port--of fromArrayCT-- ~ NARROW[ra];
RemovePort[p];
};
doomedArrayPorts.Enumerate[PerDoomedArrayPort];
};
};