SpiceOps.mesa
Christian LeCocq March 2, 1987 4:12:28 pm PST
DIRECTORY
Core,
CoreFlat,
HashTable,
IO,
Rope,
TiogaFileOps;
SpiceOps: CEDAR DEFINITIONS = BEGIN
Types
FlatWire: TYPE = CoreFlat.FlatWire;
ConvData: TYPE = REF ConvDataRec;
ConvDataRec: TYPE = RECORD[
rootCell: Core.CellType,
rootNode: TiogaFileOps.Ref,
wTable: HashTable.Table,
invTable: HashTable.Table,
nextId: CARD ← 0,
initList: Rope.ROPE,
tranList: Rope.ROPE,
printList: Rope.ROPE,
optList: Rope.ROPE,
temp: REAL ← 27.0,
limpts: INT
];
Default names and values
gndName: Rope.ROPE;
vddName: Rope.ROPE;
pModel: Rope.ROPE;
nModel: Rope.ROPE;
diodeModel: Rope.ROPE;
temp: REAL;
pendingSimulations: HashTable.Table;
simNumber: LONG CARDINAL;
Optional specifications
spiceModel,
points to a Rope.ROPE which is used for the model field of the line corresponding to the cell.
spiceOptions,
points to a Rope.ROPE which is concatenated with the .OPT line content.
spiceExtraLine: ATOM;
points to a Rope.ROPE which is inserted as a separate line in the file.
Translation to and from Spice format
in SpiceInputGenImpl.mesa :
WriteSpiceDeck: PROC [cellType: Core.CellType, outputFile: Rope.ROPE ← NIL];
two lower level ones to use in case one wants to generate a spice deck from custom data:
InitSpiceDeck: PROC [cellType: Core.CellType, outputFile: Rope.ROPE ← NIL] RETURNS [convData: ConvData];
CloseSpiceDeck: PROC [convData: ConvData, outputFile: Rope.ROPE];
in SpiceOutputViewImpl.mesa :
DisplaySpiceListing: PROC [listingFile: Rope.ROPE];
Elements to Spice input line procs
Comment: PROC [convData: ConvData, comment: Rope.ROPE];
Resistor: PROC [convData: ConvData, n1, n2: FlatWire, value: REAL, tc1, tc2: REAL ← 0.0];
Capacitor: PROC [convData: ConvData, n1, n2: FlatWire, value: REAL, incond: REAL ← 0.0];
Inductor: PROC [convData: ConvData, n1, n2: FlatWire, value: REAL, incond: REAL ← 0.0];
CoupledInductors: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, l1, l2: REAL, k: REAL];
LosslessLine: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, z0: REAL, td: REAL];
Vccs: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, value: REAL];
Vcvs: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, value: REAL];
Cccs: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, value: REAL];
Ccvs: PROC [convData: ConvData, n0, n1, n2, n3: FlatWire, value: REAL];
Diode: PROC [convData: ConvData, n1, n2: FlatWire, model: Rope.ROPE, area: REAL];
VSource: PROC [convData: ConvData, n1, n2: FlatWire, dc: REAL ← 0.0];
ISource: PROC [convData: ConvData, n1, n2: FlatWire, ma: REAL ← 0.0];
PulseVS: PROC [convData: ConvData, n1, n2: FlatWire, v1, v2, td, tr, tf, pw, per: REAL ← 0.0];
MOSFet: PROC [convData: ConvData, gate, drain, source, bulk: FlatWire, model: Rope.ROPE, l, w: REAL];
END.