DIRECTORY
CD, CDSimpleRules, CDSymbolicObjects, Core, CoreGeometry, CoreOps, CoreProperties, Process, PWCore, PWPins, Rope, Route, RTBasic, RTCoreUtil, SC, SCChanUtil, SCInitialPlace, SCInstUtil, SCPlaceUtil, SCPrivate, SCRowUtil, SCSmash, SCWidthUtil, SCUtil, Sinix, Sisyph;

SCImpl: CEDAR PROGRAM 
IMPORTS CD, CDSimpleRules, CDSymbolicObjects, CoreGeometry, CoreOps, CoreProperties, Process, PWCore, PWPins, Route, RTCoreUtil, RTBasic, SC, SCChanUtil, SCInitialPlace, SCInstUtil, SCPlaceUtil, SCPrivate, SCRowUtil, SCSmash, SCWidthUtil, SCUtil, Sisyph
EXPORTS SC
SHARES SC = {

debug: BOOLEAN _ FALSE;
Error: PUBLIC ERROR[errorType: SC.ErrorType _ callingError, explanation: Rope.ROPE _ NIL] = CODE;
Signal: PUBLIC SIGNAL[signalType: SC.ErrorType _ callingError, explanation: Rope.ROPE _ NIL] = CODE;
CreateDesignRules: PUBLIC PROC [technologyKey: ATOM, horizLayer, vertLayer: Rope.ROPE, rowDirection: SC.Direction, properties: SC.Properties _ NIL] RETURNS [designRules: SC.DesignRules] =

BEGIN
hLayer, vLayer: SC.Layer;
designRules _ NEW[SC.DesignRulesRec];
designRules.technology _ CD.FetchTechnology[technologyKey];
hLayer _ CDSimpleRules.GetLayer[technologyKey, horizLayer];
vLayer _ CDSimpleRules.GetLayer[technologyKey, vertLayer];
designRules.horizLayer _ horizLayer;
designRules.vertLayer _ vertLayer;
designRules.rowRules _ Route.CreateDesignRules[technologyKey, hLayer, vLayer, rowDirection, properties];
designRules.sideRules _ Route.CreateDesignRules[technologyKey, hLayer, vLayer, RTBasic.OtherDirection[rowDirection], properties];
END;
CreateHandle: PUBLIC PROC [cellType: Core.CellType, flattenCellType: RTCoreUtil.FlattenCellTypeProc, libName: Rope.ROPE, designRules: SC.DesignRules, name: Rope.ROPE, properties: SC.Properties _ NIL] RETURNS [handle: SC.Handle] =

BEGIN
parms: SCPrivate.Parms _ NARROW[NEW[SCPrivate.ParmsRec], SCPrivate.Parms];

IF designRules = NIL THEN SC.Signal[callingError, "No design rules."];
IF cellType = NIL THEN SC.Signal[callingError, "No Core cell type."];
handle _ NEW[SC.HandleRec];
handle.name _ IF name # NIL THEN name ELSE CoreOps.GetCellTypeName[cellType];
handle.rules _ designRules;
handle.properties _ properties;
handle.coreCellType _ cellType;

parms.libName _ libName; 
handle.parms _ parms;

IF ~SCPrivate.SetUpLayout[handle, cellType] THEN
SC.Signal[callingError, "Unable to construct layout data"];
IF ~SCPrivate.GetStructure[handle, cellType, flattenCellType] THEN
SC.Signal[callingError, "Unable to construct structure data"];
END;

InitialPlace: PUBLIC PROC [handle: SC.Handle, numRows: NAT _ 0] = {
layoutData: SCPrivate.LayoutData _ NARROW[handle.layoutData];
p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
SCSmash.RemoveSmash[handle];
SCPlaceUtil.ClrCurPlac[handle, TRUE];
SCChanUtil.InitChanWidths[handle];
SCInitialPlace.PrePlace[handle: handle, numRows: numRows, routingFactor: 1.8, initialized: TRUE];
SCInitialPlace.RowInit[handle];
SCInitialPlace.PosInit[handle];
[layoutData.lgRows.maxRowWidth, layoutData.lgRows.numMaxRows] _ SCRowUtil.FindMaxRow[handle];
SCWidthUtil.AllChanWidths[handle, areaFom];
SCInstUtil.AsgnChanPos[handle];

IF debug THEN SCPlaceUtil.WriteCurPlace[handle];
[] _ SCUtil.WriteResults["End initial placement\n initial size: ", handle, 0];
Process.SetPriority[p]}; 

PosImprove: PUBLIC PROC [handle: SC.Handle, maxCycles: INT] = {

p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
SCPrivate.PosImprove[handle, areaFom, maxCycles];
Process.SetPriority[p]};

OrientImprove: PUBLIC PROC [handle: SC.Handle, maxCycles: INT] = {

p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
SCPrivate.OrientImprove[handle, areaFom, maxCycles];
Process.SetPriority[p]};

SAInitialPlace: PUBLIC PROC [handle: SC.Handle, seed: INT] RETURNS [initialResult: SC.SAInitialResult] = {

p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
initialResult _ SCPrivate.SAInitialPlace[handle, seed];
Process.SetPriority[p]};

SAGetParms: PUBLIC PROC [handle: SC.Handle, initialResult: SC.SAInitialResult, cellType: Core.CellType] RETURNS [saParms: SC.SAParms] = {

p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
saParms _ SCPrivate.SAGetParms[handle, initialResult, cellType];
Process.SetPriority[p]};

SAPlaceImprove: PUBLIC PROC [handle: SC.Handle, saParms: SC.SAParms, seed: INT] = {

p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
SCPrivate.SAPlaceImprove[handle, saParms, seed];
Process.SetPriority[p]};

GlobalRoute: PUBLIC PROC [handle: SC.Handle] = {
p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
SCSmash.RemoveSmash[handle];
SCSmash.SmashAllNets[handle, TRUE];
Process.SetPriority[p]};

DetailRoute: PUBLIC PROC [handle: SC.Handle] RETURNS [result: SC.Result] = {
p: Process.Priority _ Process.GetPriority[];
Process.SetPriority[Process.priorityBackground];
result _ SCPrivate.DetailRoute[handle];
Process.SetPriority[p]};


CreateLayout: PUBLIC PROC [technologyKey: ATOM, horizLayer, vertLayer: Rope.ROPE, rowDirection: SC.Direction, numRows: NAT, cellType: Core.CellType, flattenCellType: RTCoreUtil.FlattenCellTypeProc, libName: Rope.ROPE _ NIL, name: Rope.ROPE _ NIL, properties: SC.Properties _ NIL] RETURNS [object: CD.Object] = {
result: SC.Result;
designRules: SC.DesignRules _ SC.CreateDesignRules[technologyKey, horizLayer, vertLayer, rowDirection, properties];
handle: SC.Handle _ SC.CreateHandle[cellType, flattenCellType, libName, designRules, name, properties];
SC.InitialPlace[handle, 0];
SC.SAPlaceImprove[handle, SC.SAGetParms[handle, SC.SAInitialPlace[handle], cellType]];
SC.GlobalRoute[handle];
result _ SC.DetailRoute[handle];
RETURN [result.object];
};

Destroy: PUBLIC PROC [handle: SC.Handle] ~ {
SCPrivate.DestroyLayout[handle];
SCPrivate.DestroyStructure[handle];
SCUtil.DestroyRules[handle];
SCUtil.DestroyParms[handle];
handle.name _ NIL;
handle.coreCellType _ NIL;
handle.properties _ NIL};

StandardCellLayout: PUBLIC PWCore.LayoutProc = {
result: SC.Result;
saParms: SC.SAParms;
initialResult: SC.SAInitialResult;
hMaterial: Rope.ROPE _ "metal";
vMaterial: Rope.ROPE _ "metal2";
rules: SC.DesignRules _ SC.CreateDesignRules[technologyKey, hMaterial, vMaterial, horizontal];
handle: SC.Handle _ SC.CreateHandle[cellType, RTCoreUtil.defaultFlatten, libName, rules];
SC.InitialPlace[handle, RTCoreUtil.GetCoreIntProp[cellType, SC.numRows, 0]];
initialResult _ SC.SAInitialPlace[handle];
saParms _ SC.SAGetParms[handle, initialResult, cellType];
SC.SAPlaceImprove[handle: handle, saParms: saParms];
SC.GlobalRoute[handle];
SC.PosImprove[handle, 2];
SC.OrientImprove[handle, 2];
SCSmash.CheckFts[handle];
SCSmash.CheckExits[handle];
result _ SC.DetailRoute[handle];
SCUtil.CheckExports[result];
SC.Destroy[handle];
RETURN[result.object]
};

SmashPins: PROC [wire: Core.Wire] = {CoreGeometry.PutPins[extractMode.decoration, wire, NIL]};

StandardCellDecorate: PUBLIC PWCore.DecorateProc = {

EachPublicPin: PWPins.InstanceEnumerator = {
name: Rope.ROPE _ CDSymbolicObjects.GetName[inst];
wire: Core.Wire _ CoreOps.FindWire[cellType.public, name];
pins: LIST OF CD.Instance;
IF wire=NIL THEN RETURN;
pins _ CoreGeometry.GetPins[extractMode.decoration, wire];
CoreGeometry.PutPins[extractMode.decoration, wire, CONS [inst, pins]];
};

CoreOps.VisitRootAtomics[cellType.public, SmashPins];
CoreGeometry.PutIR[extractMode.decoration, cellType, CD.InterestRect[obj]];
[] _ PWPins.EnumerateEdgePins[obj, EachPublicPin];
};

StandardCellAttibutes: PUBLIC PWCore.AttributesProc = {-- [cellType: Core.CellType]
FindSideForEachPin: CoreGeometry.EachWirePinProc = {
PushPropOnAtomic: PROC [wire: Core.Wire] ~ {
CoreProperties.PutWireProp[wire, SC.sideProp, ref];
};
ref: REF _ SELECT side FROM
bottom => SC.bottomSideValue,
top => SC.topSideValue,
right => SC.rightSideValue,
left => SC.leftSideValue,
ENDCASE => SC.noSideValue;
IF wire.size=0 THEN CoreProperties.PutWireProp[wire, SC.sideProp, ref] 
ELSE CoreOps.VisitRootAtomics[wire, PushPropOnAtomic];
};
decoration: CoreGeometry.Decoration _ Sisyph.mode.decoration;
IF CoreGeometry.HasIR[decoration, cellType] THEN
[] _ CoreGeometry.EnumerateWireSides[decoration, cellType, FindSideForEachPin];
}; 


SCLayoutAtom: ATOM _ PWCore.RegisterLayoutAtom[$SC, StandardCellLayout, StandardCellDecorate, StandardCellAttibutes];

technologyKey: ATOM _ $cmosB;		-- $cmosA or $cmosB
libName: Rope.ROPE _ "CMOSB";
extractMode: Sinix.Mode _ PWCore.extractMode;
numRows: PUBLIC ATOM _ $numRows;
sideProp: PUBLIC ATOM _ $Side;
bottomSideValue: PUBLIC ATOM _ $bottom;
rightSideValue: PUBLIC ATOM _ $right;
topSideValue: PUBLIC ATOM _ $top;
leftSideValue: PUBLIC ATOM _ $left;
noSideValue: PUBLIC ATOM _ $none;
rowProp: PUBLIC ATOM _ $Row;
positionProp: PUBLIC ATOM _ $Position;
leftPowerProp: PUBLIC ATOM _ $LeftPower;
rightPowerProp: PUBLIC ATOM _ $RightPower;
investmentProp: PUBLIC ATOM _ $Investment;
veryLongValue: PUBLIC ATOM _ $veryLong;
longValue: PUBLIC ATOM _ $long;
mediumValue: PUBLIC ATOM _ $medium;
shortValue: PUBLIC ATOM _ $short;
veryShortValue: PUBLIC ATOM _ $veryShort;
t0SA: PUBLIC ATOM _ $t0SA;
alphaSA: PUBLIC ATOM _ $alphaSA;
eqVarLimitSA: PUBLIC ATOM _ $eqVarLimitSA;
fzVarLimitSA: PUBLIC ATOM _ $fzVarLimitSA;
eqTabSizeSA: PUBLIC ATOM _ $eqTabSizeSA;
fzTabSizeSA: PUBLIC ATOM _ $fzTabSizeSA;
bottomMaxExits: PUBLIC ATOM _ $BottomMaxExits;
rightMaxExits: PUBLIC ATOM _ $RightMaxExits;
topMaxExits: PUBLIC ATOM _ $TopMaxExits;
leftMaxExits: PUBLIC ATOM _ $LeftMaxExits;
bottomExitSpacing: PUBLIC ATOM _ $BottomExitSpacing;
rightExitSpacing: PUBLIC ATOM _ $RightExitSpacing;
topExitSpacing: PUBLIC ATOM _ $TopExitSpacing;
leftExitSpacing: PUBLIC ATOM _ $LeftExitSpacing;
interestingProperties: PUBLIC RTCoreUtil.PropertyKeys _ NEW[RTCoreUtil.PropertyKeysRec[23]];
interestingProperties.p[0] _ SC.sideProp;
interestingProperties.p[1] _ SC.rowProp;
interestingProperties.p[3] _ SC.positionProp;
interestingProperties.p[4] _ SC.leftPowerProp;
interestingProperties.p[5] _ SC.rightPowerProp;
interestingProperties.p[6] _ SC.numRows;
interestingProperties.p[7] _ SC.bottomMaxExits;
interestingProperties.p[8] _ SC.rightMaxExits;
interestingProperties.p[9] _ SC.topMaxExits;
interestingProperties.p[10] _ SC.leftMaxExits;
interestingProperties.p[11] _ SC.bottomExitSpacing;
interestingProperties.p[12] _ SC.rightExitSpacing;
interestingProperties.p[13] _ SC.topExitSpacing;
interestingProperties.p[14] _ SC.leftExitSpacing;
interestingProperties.p[15] _ SC.investmentProp;
interestingProperties.p[16] _ SC.numRows;
interestingProperties.p[17] _ SC.t0SA;
interestingProperties.p[18] _ SC.alphaSA;
interestingProperties.p[19] _ SC.eqVarLimitSA;
interestingProperties.p[20] _ SC.fzVarLimitSA;
interestingProperties.p[21] _ SC.eqTabSizeSA;
interestingProperties.p[22] _ SC.fzTabSizeSA;
}. 





SCImpl.mesa  SCImpl.mesa
Copyright c 1985, 1986 by Xerox Corporation.  All rights reserved.
Bryan Preas, August 14, 1986 5:07:05 pm PDT 
Last Edited by: Bryan Preas December 15, 1986 2:14:16 pm PST
Errors
Design Rules
Define the standard cell design rules.  technologyKey values are predefinded for now. horizLayer, vertLayer should be "poly", "metal" or "metal2".
Standard Cell Handles and Results
Create a standard cell design.  The standard cell design definition includes the design rules (conductor and via widths and spacings) and the circuit definition.
set up the layout data

set up the structure data
Standard Cell Optimization and Construction
Determine an initial placement for the instances.

Improve the positions of instances whithin rows.
Improve the orientation of instances .
Initialize for simulated annealing improvement.
determine parameters for simulated placement.
Improve the placement for the instances by simulated annealing.
Determine strategic paths for the wiring that must cross cell rows.

Determine actual wiring paths.  

Create a standard cell object by performing the above operations

Remove circular references so garbage collection can work

-- The cellType to layout is a record cellType containing elements from MSI; the layout proc flattens the Core description and calls the standard cell placer and router.
-- Puts as property on public wires their side
[wire: Core.Wire, instance: CD.Instance, min: INT, max: INT, side: CoreGeometry.Side, layer: CD.Layer] RETURNS [quit: BOOL _ FALSE]
Properties
Used to specify the number of rows for a standard cell assembly.  Should be a property on Core cellType being laid out
Used to specify the side on which a public pin is to be placed.  sideProp with (mumble)Value should be a property/value on a public wire
Used to specify the row on which a logic cell is to be placed. rowProp and and integer row number should be a property/value on a locig cell insatance
Used to specify the position of a logic within a row or of an public pin on a side.  May be used on public wire or a logic cell instance.
Used to specify the side on which power busses are to be placed.  May be used on 0, 1 or 2 public wires.
Used to specify the investment to make in placement.
Used to specify simulated aneealing partameters to be used for placement
Used to specify the maximum number or publics on a side.
Used to specify the HINT for publics spacing on a side.
Cedar does not allow initialization of a sequence in the NEW!
Used to specify all the properties that are interesting to SC
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