GismoDoc.tioga
Written by Giordano Bruno Beretta, November 18, 1985 7:16:54 pm PST
gbb, September 2, 1986 1:04:13 pm PDT
GISMO
DATOOLS 6.1 — FOR INTERNAL XEROX USE ONLY
Gismo
Giordano Beretta
© Copyright 1985, 1986 Xerox Corporation. All rights reserved.
Abstract: Gismo is a collection of small interactive design rule checkers verifying single rules. Use the load file Gismo.Load and use the ChipNDale program menu to apply them interactively.
Created by: Giordano Beretta & Christian Jacobi
Maintained by: Giordano Beretta <Beretta.PA>
Keywords: Design Rule Checking, Layout Verification, Design Automation Tools
XEROX  Xerox Corporation
   Palo Alto Research Center
   3333 Coyote Hill Road
   Palo Alto, California 94304

For Internal Xerox Use Only
1. Well tester
This utility enumerates all wells in a set of selected cells. Any well that contains p-diffusion and has not a proper contact is flagged to be in error.
2. Via flatness for CMOS-B
Enumerates all vias and verifies that they are on flat topology. See the definition module for details.
This tool uses a novel approach to design rule checking better suited to the problem at hand. Rather than storing the geometry and and performing metric operations to verify the rules, ViaFlatness stores only topological information. This amounts to a set of boolean vectors stored in a corner stitched plane. Basically the program performs two passes on the data. In the first pass the topological data structure is constructed. In the second pass it is interpreted and conclusions are drawn on the violation of design rules.
The violations found are logged in the file []<>Temp>DRC>ViaFlatness.log.
3. Diffusion and wells for CMOS-B
Verifies for every diffusion rectangle that it lies in a well of the opposite type and with sufficient surrounding. Substrate and p-well are given the same sematics. If twin-wells are used, this utility verifies that wells of the opposite type do not overlap.
Spinifex user will not need this utility unless they lay out the n-wells and the p-diffusion separately.
Since it is common not to lay out the wells in a hierarchical manner, the hierarchy is flattened out completely.
The violations found are logged in the file []<>Temp>DRC>DiffInWell.log.