DIRECTORY 
CD, CDAtomicObjects, CDBasics, CDCells, CDDirectory, CDLayers, CDProperties, CDRects, CDSymbolicObjects, CDTexts,
CMos, 
Core, CoreClasses, CoreOps, CoreProperties,
CoreGeometry, 
PWObjects,
Rope, Sinix, SinixOps;

SinixCMosA: CEDAR PROGRAM
IMPORTS CD, CDBasics, CDCells, CDDirectory, CDLayers, CDProperties, CDRects, CDSymbolicObjects, CDTexts, CMos, CoreClasses, CoreGeometry, CoreOps, CoreProperties, PWObjects, Rope, Sinix, SinixOps
SHARES CDCells, CDLayers, CDRects, CDSymbolicObjects, CDTexts = 
BEGIN
CellType: TYPE = Core.CellType;
Wire: TYPE = Core.Wire;
Object: TYPE = CD.Object;
Properties: TYPE = Core.Properties;
ROPE: TYPE = Core.ROPE;
ROPES: TYPE = LIST OF ROPE;
mode: Sinix.Mode _ NEW [Sinix.ModeRec _ [
extractProcProp: PWObjects.RegisterProp[$CMosAExtractProc, TRUE],
decoration: CoreGeometry.CreateDecoration["CMosA"],
equalProc: Sinix.CompareProps,
instanceLayer: Sinix.DefaultInstanceLayer,
touchProc: CoreGeometry.Touch
]];

AddRect: PROC [mode: Sinix.Mode, wire: Wire, rect: CD.Rect, layer: CD.Layer] = {
instance: CoreGeometry.Instance _ [
CDRects.CreateRect[CDBasics.SizeOfRect[rect], layer], [CDBasics.BaseOfRect[rect]]
];
CoreGeometry.PutPins[mode.decoration, wire, CONS [instance, CoreGeometry.GetPins[mode.decoration, wire]]];
};
MakeAbstract: PUBLIC PROC [abstract, represents: CD.Layer] RETURNS [sameAbstract: CD.Layer] = {
CDLayers.MakeAbstract[abstract, represents]; RETURN [abstract];
};

nsource: CD.Layer _ MakeAbstract[CD.NewLayer[CMos.cmos, $CNSource], CMos.ndif];
ndrain: CD.Layer _ MakeAbstract[CD.NewLayer[CMos.cmos, $CNDrain], CMos.ndif];
psource: CD.Layer _ MakeAbstract[CD.NewLayer[CMos.cmos, $CPSource], CMos.pdif];
pdrain: CD.Layer _ MakeAbstract[CD.NewLayer[CMos.cmos, $CPDrain], CMos.pdif];

PropsFromSatellites: PROC [obj: Object, properties: CD.PropList] RETURNS [props: Core.Properties _ NIL] = {
name: ROPE _ NIL;
FOR ropes: ROPES _ NARROW [CDProperties.GetListProp[properties, Sinix.satellitesProp]], ropes.rest WHILE ropes#NIL DO
IF name#NIL AND NOT Rope.Equal[ropes.first, name] THEN SIGNAL Sinix.FusionPropMismatch[CDDirectory.Name[obj], CoreOps.nameProp, name, ropes.first];
name _ ropes.first;
ENDLOOP;
IF name#NIL THEN props _ CoreProperties.Props[[CoreOps.nameProp, name]];
};

ExtractTransistor: Sinix.ExtractProc = {
size: CD.Position = CDBasics.SizeOfRect[obj.bbox];
cellType: CellType;
lambda: CD.Number = CMos.lambda;
ext: CD.Number = 2*lambda;
wellSurr: CD.Number _ 0;
innerX: CD.Number _ 0;
dif: CD.Layer _ IF obj.layer=CMos.wpdif OR obj.layer=CMos.pdif THEN CMos.pdif ELSE CMos.ndif;
gateWire, sourceWire, drainWire: Wire;
IF obj.layer=CMos.wpdif OR obj.layer=CMos.wndif THEN {
wellSurr _ CMos.wellSurround;
innerX _ CMos.wellSurround-ext;
};
cellType _ CoreClasses.CreateTransistor[[
type: IF dif=CMos.pdif THEN pE ELSE nE,
length: (size.y-2*ext-2*wellSurr)/lambda-2,
width: (size.x-2*ext-2*innerX)/lambda]];
props _ PropsFromSatellites[obj, properties];
gateWire _ cellType.public[0];
sourceWire _ cellType.public[1];
drainWire _ cellType.public[2];
IF obj.layer=CMos.wpdif OR obj.layer=CMos.wndif THEN {
AddRect[mode, sourceWire, 
[x1: ext, x2: size.x-2*CMos.wellSurround+ext, y1: 0, y2: ext], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, drainWire, 
[x1: ext, x2: size.x-2*CMos.wellSurround+ext, y1: size.y-2*CMos.wellSurround-ext, y2: size.y-2*CMos.wellSurround], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
} ELSE {
AddRect[mode, sourceWire, 
[x1: ext, x2: size.x-ext, y1: 0, y2: ext], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, drainWire, 
[x1: ext, x2: size.x-ext, y1: size.y-ext, y2: size.y], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
};
FOR rList: CDAtomicObjects.DrawList _ NARROW [obj.specific, CDAtomicObjects.AtomicObsSpecific].rList, rList.rest WHILE rList#NIL DO
rect: CD.Rect _ rList.first.r;
layer: CD.Layer _ rList.first.layer;
SELECT layer FROM
CMos.ndif						=> {};
CMos.pdif						=> {};
CMos.pol						=> AddRect[mode, gateWire, rect, CMos.pol];
CMos.nwell, CMos.pwell	=> {};
ENDCASE							=> ERROR;
ENDLOOP;
CoreGeometry.PutObject[mode.decoration, cellType, obj];
result _ cellType;
};

ExtractTransistorL: Sinix.ExtractProc = {
size: CD.Position = CDBasics.SizeOfRect[obj.bbox];
cellType: CellType;
lambda: CD.Number = CMos.lambda;
wellSurround: CD.Number = CMos.wellSurround;
ext: CD.Number = 2*lambda;
wellSurr: CD.Number _ 0;
innerX: CD.Number _ 0;
gateWire, sourceWire, drainWire: Wire;
dif: CD.Layer _ IF obj.layer=CMos.wpdif OR obj.layer=CMos.pdif THEN CMos.pdif ELSE CMos.ndif;
IF obj.layer=CMos.wpdif OR obj.layer=CMos.wndif THEN {
wellSurr _ wellSurround;
innerX _ wellSurround-ext;
};
cellType _ CoreClasses.CreateTransistor[[
type: IF obj.layer=CMos.wpdif OR obj.layer=CMos.pdif THEN pE ELSE nE,
length: 2,
width: (size.x+size.y-2*innerX-2*wellSurr)/lambda - 12]];
props _ PropsFromSatellites[obj, properties];
gateWire _ cellType.public[0];
sourceWire _ cellType.public[1];
drainWire _ cellType.public[2];
IF obj.layer=CMos.wpdif OR obj.layer=CMos.wndif THEN {
AddRect[mode, sourceWire, 
[x1: ext, x2: size.x-wellSurr-9*lambda, y1: 6*lambda, y2: 8*lambda], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, sourceWire, 
[x1: size.x-wellSurr-11*lambda, x2: size.x-wellSurr-9*lambda, y1: 6*lambda, y2: size.y-innerX-ext-wellSurr], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, drainWire, 
[x1: ext, x2: size.x-wellSurr-3*lambda, y1: 0, y2: 2*lambda], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
AddRect[mode, drainWire, 
[x1: size.x-wellSurr-5*lambda, x2: size.x-wellSurr-3*lambda, y1: 0, y2: size.y-innerX-ext-wellSurr], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
} ELSE {
AddRect[mode, sourceWire, 
[x1: innerX+ext, x2: size.x-wellSurr-6*lambda, y1: wellSurr+6*lambda, y2: wellSurr+8*lambda], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, sourceWire, 
[x1: size.x-wellSurr-8*lambda, x2: size.x-wellSurr-6*lambda, y1: wellSurr+6*lambda, y2: size.y-innerX-ext], 
IF dif=CMos.pdif THEN psource ELSE nsource];
AddRect[mode, drainWire, 
[x1: innerX+ext, x2: size.x-wellSurr, y1: wellSurr, y2: wellSurr+2*lambda], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
AddRect[mode, drainWire, 
[x1: size.x-wellSurr-2*lambda, x2: size.x-wellSurr, y1: wellSurr, y2: size.y-innerX-ext], 
IF dif=CMos.pdif THEN pdrain ELSE ndrain];
};
FOR rList: CDAtomicObjects.DrawList _ NARROW [obj.specific, CDAtomicObjects.AtomicObsSpecific].rList, rList.rest WHILE rList#NIL DO
rect: CD.Rect _ rList.first.r;
layer: CD.Layer _ rList.first.layer;
SELECT layer FROM
CMos.pol						=> AddRect[mode, gateWire, rect, CMos.pol];
CMos.ndif						=> {};
CMos.pdif						=> {};
CMos.nwell, CMos.pwell	=> {};
ENDCASE							=> ERROR;
ENDLOOP;
CoreGeometry.PutObject[mode.decoration, cellType, obj];
result _ cellType;
};
Atomic: PROC [className: ATOM] = {
class: CD.ObjectClass = CD.FetchObjectClass[className, CMos.cmos];
CDProperties.PutProp[class, mode.extractProcProp, $ExtractAtomic];
};

CDProperties.PutLayerProp[CMos.pwell, $Well, $PWell];
CDProperties.PutLayerProp[CMos.nwell, $Well, $NWell];
CDProperties.PutLayerProp[CMos.ndif, $RoutingLayer, $RoutingLayer];
CDProperties.PutLayerProp[CMos.pdif, $RoutingLayer, $RoutingLayer];
CDProperties.PutLayerProp[CMos.pol, $RoutingLayer, $RoutingLayer];
CDProperties.PutLayerProp[CMos.met, $RoutingLayer, $RoutingLayer];
CDProperties.PutLayerProp[CMos.met2, $RoutingLayer, $RoutingLayer];

SinixOps.RegisterDefaultLayoutMode[mode, CMos.cmos];

Sinix.RegisterExtractProc[$CMosAExtractTransistor, ExtractTransistor];
Sinix.RegisterExtractProc[$CMosAExtractTransistorL, ExtractTransistorL];

CDProperties.PutProp[CDCells.pCellClass, mode.extractProcProp, $ExtractCell];
CDProperties.PutProp[CDSymbolicObjects.pinClass, mode.extractProcProp, $ExtractPin];
CDProperties.PutProp[CDSymbolicObjects.segmentClass, mode.extractProcProp, $ExtractPin];
CDProperties.PutProp[CDSymbolicObjects.markClass, mode.extractProcProp, $ExtractPin];
CDProperties.PutProp[CDRects.bareRectClass, mode.extractProcProp, $ExtractRect];
Atomic[className: $CSimpleCon]; 
Atomic[className: $CWellSimpleCon];
Atomic[className: $CButtingCont]; 
Atomic[className: $CWellButtingCont];
Atomic[className: $CVia];
Atomic[className: $CDifShortCon]; 
Atomic[className: $CWellDifShortCon];
Atomic[className: $CMosPDifRect];
CDProperties.PutProp[CD.FetchObjectClass[$CTrans, CMos.cmos], mode.extractProcProp, $CMosAExtractTransistor];
CDProperties.PutProp[CD.FetchObjectClass[$CWellTrans, CMos.cmos], mode.extractProcProp, $CMosAExtractTransistor];
CDProperties.PutProp[CD.FetchObjectClass[$CLTrans, CMos.cmos], mode.extractProcProp, $CMosAExtractTransistorL];
CDProperties.PutProp[CD.FetchObjectClass[$CLWellTrans, CMos.cmos], mode.extractProcProp, $CMosAExtractTransistorL];
CDProperties.PutProp[CDTexts.rigidTextClass, mode.extractProcProp, $ExtractNull];
CDProperties.PutProp[CDTexts.flipTextClass, mode.extractProcProp, $ExtractNull];
END.

jSinixCMosA.mesa
Copyright c 1985 by Xerox Corporation.  All rights reversed.
Created by Bertrand Serlet August 15, 1985 2:09:54 pm PDT
Bertrand Serlet December 16, 1986 10:24:20 pm PST
Pradeep Sindhu December 2, 1985 6:42:40 pm PST
Barth, January 13, 1986 1:41:27 pm PST
Jean-Marc Frailong July 1, 1986 1:48:07 pm PDT

As ever
Properties and extraction of common objects
Transistors
New layers for transistors
source is the smallest diff
Initialization
Layer properties
Highlight for this technology
Registering extract procs
Cells, Pins
Rectangles
Contacts
Diffusion wires
Transistors
Angle Transistors 
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