DIRECTORY Core; ElectricalCoreClasses: CEDAR DEFINITIONS = BEGIN OPEN Core; Volts: TYPE = REAL; KOhms: TYPE = REAL; pF: TYPE = REAL; ns: TYPE = REAL; mA: TYPE = REAL; uH: TYPE = REAL; RopeFromVolts: PROC [v: Volts] RETURNS [rope: ROPE]; RopeFromKOhms: PROC [r: KOhms] RETURNS [rope: ROPE]; RopeFrompF: PROC [c: pF] RETURNS [rope: ROPE]; RopeFromns: PROC [t: ns] RETURNS [rope: ROPE]; RopeFrommA: PROC [i: mA] RETURNS [rope: ROPE]; RopeFromuH: PROC [l: uH] RETURNS [rope: ROPE]; resistorCellClass: CellClass; Resistor: TYPE = REF ResistorRec; ResistorRec: TYPE = RECORD [ value: KOhms]; ResistorPort: TYPE = MACHINE DEPENDENT {n0(0), n1(1)}; CreateResistor: PROC [args: ResistorRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [resistor: CellType]; inductorCellClass: CellClass; Inductor: TYPE = REF InductorRec; InductorRec: TYPE = RECORD [ value: uH]; InductorPort: TYPE = MACHINE DEPENDENT {n0(0), n1(1)}; CreateInductor: PROC [args: InductorRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [inductor: CellType]; capacitorCellClass: CellClass; Capacitor: TYPE = REF CapacitorRec; CapacitorRec: TYPE = RECORD [ value: pF]; CapacitorPort: TYPE = MACHINE DEPENDENT {n0(0), n1(1)}; CreateCapacitor: PROC [args: CapacitorRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [capacitor: CellType]; diodeCellClass: CellClass; Diode: TYPE = REF DiodeRec; DiodeRec: TYPE = RECORD [ type: DiodeType _ Junction, area: REAL]; DiodeType: TYPE = {Junction, Zenner, Varicap, Special}; DiodePort: TYPE = MACHINE DEPENDENT {n0(0), n1(1)}; CreateDiode: PROC [args: DiodeRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [cellType: CellType]; coupledIndCellClass: CellClass; CoupledInd: TYPE = REF CoupledIndRec; CoupledIndRec: TYPE = RECORD [ l1: uH, -- inductance between n0 and n1 l2: uH, -- inductance between n2 and n3 k: REAL -- coefficient of coupling ]; CoupledIndPort: TYPE = MACHINE DEPENDENT {n0(0), n1(1), n2(2), n3(3)}; CreateCoupledInd: PROC [args: CoupledIndRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [cellType: CellType]; losslessLineCellClass: CellClass; LosslessLine: TYPE = REF LosslessLineRec; LosslessLineRec: TYPE = RECORD [ z0: KOhms, -- characteristic impedance td: ns -- transmission delay ]; LosslessLinePort: TYPE = MACHINE DEPENDENT {n0(0), n1(1), n2(2), n3(3)}; CreateLosslessLine: PROC [args: LosslessLineRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [cellType: CellType]; linearSourceCellClass: CellClass; LinearSource: TYPE = REF LinearSourceRec; LinearSourceRec: TYPE = RECORD [ type: LinearType _ VCVS, value: REAL]; LinearType: TYPE = {VCCS, VCVS, CCCS, ccvs}; LinearSourcePort: TYPE = MACHINE DEPENDENT {n0(0), n1(1), n2(2), n3(3)}; CreateLinearSource: PROC [args: LinearSourceRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [cellType: CellType]; signalGeneratorCellClass: CellClass; SignalGenerator: TYPE = REF SignalGeneratorRec; SignalGeneratorRec: TYPE = RECORD [ type: SignalGeneratorType _ DC, onLevel: Volts _ 5.0, offLevel: Volts _ 0.0, period: ns _ 0.0, width: ns _ 0.0, tRise: ns _ 0.0, tFall: ns _ 0.0, tDelay: ns _ 0.0]; SignalGeneratorType: TYPE = {DC, RectWave, OneShot, Step}; SignalGeneratorPort: TYPE = MACHINE DEPENDENT {n(0)}; CreateSignalGenerator: PROC [args: SignalGeneratorRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [signalGenerator: CellType]; probeCellClass: CellClass; Probe: TYPE = REF ProbeRec; ProbeRec: TYPE = RECORD [ type: ProbeType _ Voltage, scale: REAL _ 1.0, resistance: KOhms _ 0.001]; ProbeType: TYPE = {Voltage, Current}; CreateProbe: PROC [args: ProbeRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [probe: CellType]; initCellClass: CellClass; Init: TYPE = REF InitRec; InitRec: TYPE = RECORD [ type: InitType _ Voltage, value: REAL _ 5.0, time: ns _ 0.0]; InitType: TYPE = {Voltage, Current}; CreateInit: PROC [args: InitRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [init: CellType]; panelCellClass: CellClass; Panel: TYPE = REF PanelRec; PanelRec: TYPE = RECORD [ title: ROPE _ NIL, tMin: ns _ 0.0, tMax: ns _ 100.0, tStep: ns _ 0.05, yMin: Volts _ -1.0, yMax: Volts _ 5.0, tScale: REAL _ 1.0, iScale: mA _ 1.0]; CreatePanel: PROC [args: PanelRec, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [Panel: CellType]; END. 0ElectricalCoreClasses.mesa Written by: Pradeep Sindhu April 1, 1986 1:12:34 am PST Last Edited by: Christian LeCocq February 11, 1987 5:10:50 pm PST Bertrand Serlet June 17, 1986 5:23:34 pm PDT Pradeep Sindhu April 30, 1986 10:31:53 pm PDT Theory This interface defines the electrical elements of integrated circuits, plus a few tricks used by the simulators. Basic Types and Associated Procs Resistor Public wires: n0, n1. Inductor Public wires: n0, n1. Capacitor Public wires: n0, n1. Diode Public wires: n0, n1. Coupled Inductors Public wires: n0, n1, n2, n3. Lossless Line Public wires: n0, n1, n2, n3. Linear Sources Public wires: n0, n1, n2, n3. SignalGenerator Public wires: n. Probe Public wires: depends on the type of probe. Init Public wires: depends on the type of init. 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