(Interface
(Define inout port (multiple C10 C11 C13 C20 C21 C22 C23))
(Define inout port (multiple SELECTA SELECTB STROBE1 STROBE2))
(Define inout port (multiple Y1 Y2)))
(Contents
(Define local signal (multiple EX1556 EX1551 EX1546 EX1541))
(Instance OR4 Logic EX1519)
(Joined (qualify ex1519 in1) ex1556)
(Joined (qualify ex1519 in2) ex1551)
(Joined (qualify ex1519 in3) ex1546)
(Joined (qualify ex1519 in4) ex1541)
(Comment "this show the simple minded conversion from a part-oriented netlist description")
(Instance AND4 Logic ex1509)
(Instance AND4 Logic ex1510)
(Instance AND4 Logic ex1511)
(Instance AND4 Logic ex1512)
(Joined (qualify ex1519 in4) (qualify ex1518 in3) (qualify ex1509 out))
(Joined (qualify ex1510 in3) (qualify ex1512 out) ex1551)
(Comment "and so on, until the desired netlist is described"))))