LayoutSimulation.mesa
Copyright © 1986 by Xerox Corporation. All rights reversed.
Created by Bertrand Serlet August 30, 1985 11:41:04 am PDT
Bertrand Serlet January 27, 1987 6:20:55 pm PST
Pradeep Sindhu December 2, 1985 6:42:39 pm PST
Barth, March 21, 1986 12:47:57 pm PST
Christian Jacobi, January 7, 1987 11:33:05 am PST
DIRECTORY
CD, CDProperties, CDSequencer,
Core, CoreFlat, CoreOps,
IO, Ports,
PWCore,
Rosemary, SinixOps,
TerminalIO;
LayoutSimulation:
CEDAR
PROGRAM
IMPORTS CDProperties, CDSequencer, CoreFlat, CoreOps, IO, Ports, PWCore, Rosemary, SinixOps, TerminalIO =
BEGIN
ROPE: TYPE = Core.ROPE;
CellType: TYPE = Core.CellType;
Wire: TYPE = Core.Wire;
SeeRoseValue:
PROC [command: CDSequencer.Command] = {
simulation: Rosemary.Simulation ← NARROW [CDProperties.GetDesignProp[command.design, $Simulation]];
instance: CD.Instance;
root: CellType;
flatWires: LIST OF CoreFlat.FlatWireRec;
[instance: instance, root: root, flatWires: flatWires] ← SinixOps.SelectedCoreObjects[command.design, PWCore.extractMode, TRUE];
SinixOps.HighlightNets[PWCore.extractMode.decoration, command.design, instance, root, flatWires];
FOR list:
LIST
OF CoreFlat.FlatWireRec ← flatWires, list.rest
WHILE list#
NIL
DO
TerminalIO.PutF[
"Value[%g] = %g\n",
IO.rope[CoreFlat.WirePathRope[root, list.first]],
IO.rope[Ports.LSToRope[
Rosemary.WireValue[simulation, NEW [CoreFlat.FlatWireRec ← list.first]],
CoreOps.WireBits[list.first.wire]
]]
];
ENDLOOP;
};
CDSequencer.ImplementCommand[key: $DAUserSeeRoseValue, proc: SeeRoseValue, queue: doQueue];
END.