[Cyan]<DATools6.1>CellLibraries>WireIconsImpl.mesa!1

WireIconsImpl.mesa

Bertrand Serlet August 4, 1986 6:35:02 pm PDT

DIRECTORY CD, CDDirectory, CDProperties, CDRects, CDTexts, Core, CoreOps, CMosB, IO, PW, Sinix, Sisyph, WireIcons;

WireIconsImpl: CEDAR PROGRAM

IMPORTS CDDirectory, CDProperties, CDRects, CDTexts, CoreOps, IO, PW, Sinix, Sisyph

EXPORTS WireIcons = BEGIN OPEN WireIcons;

Types and constants

l: INT ← CMosB.lambda;

font: CDTexts.CDFont ← CDTexts.MakeFont["Xerox/TiogaFonts/Helvetica8", 2];

Composer icon

MakeComposer: PUBLIC PROC [size: NAT] RETURNS [wire: Wire, obj: CD.Object] = {

increment: INT ← SELECT TRUE FROM

size<4 => 8, size<6 => 6, size<8 => 4, size<16 => 2, size<32 => 2, ENDCASE => 1;

wire ← CoreOps.CreateWires[size: size];

obj ← PW.CreateEmptyCell[];

The big rectangle

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[increment*(size-1)*l+7*l/2, 7*l/2], CD.commentLayer], [0, l/2]];

The structured wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, wire,

PW.IncludeInCell[obj, CDRects.CreateRect[[l/2, l/2], CD.commentLayer], [increment*(size-1)*l/2+2*l, 4*l]]

];

The composed wires

FOR i: NAT IN [0 .. size) DO

wire[i] ← CoreOps.CreateWire[];

Sinix.AddPinsProp[

Sisyph.sisyphMode, wire[i],

PW.IncludeInCell[obj, CDRects.CreateRect[[l/2, l/2], CD.commentLayer], [increment*i*l+2*l, 0]]

];

ENDLOOP;

The first composed wire

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l, l/2], CD.commentLayer], [3*l/2, 0]];

CDProperties.PutObjectProp[obj, $ComposerSize, NEW [INT ← size]];

CDProperties.PutObjectProp[obj, Sisyph.sisyphMode.extractProcProp, $WireIconsExtractComposer];

PW.RepositionCell[obj];

};

Composer: PW.UserProc = {

int: INT ← PW.RequestInt["Size of the composer? "];

IF int<1 THEN RETURN;

name ← IO.PutFR[":Composer[%g].icon", IO.int[int]];

ob ← CDDirectory.Fetch[design, name].object;

IF ob=NIL THEN {

ob ← MakeComposer[NAT [int]].obj;

[] ← CDDirectory.Include[design, ob, name];

};

ExtractComposer: Sinix.ExtractProc = {

refNat: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ComposerSize]];

size: NAT ← NAT [refNat^];

result ← MakeComposer[size].wire;

};

Bus icon

MakeSlash: PUBLIC PROC [] RETURNS [obj: CD.Object] = {

obj ← PW.CreateEmptyCell[];

FOR i: INT IN [0 .. 2*l+l/4) DO

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l/4, l/4], CD.commentLayer], [i, 2*i]];

ENDLOOP;

PW.RepositionCell[obj];

};

MakeBus: PROC [size: NAT, slash: CD.Object ← NIL] RETURNS [wire: Wire, obj: CD.Object] = {

wire ← CoreOps.CreateWires[size: size];

obj ← PW.CreateEmptyCell[];

The slash (if not present, the resulting obj should NOT be used)

IF slash#NIL THEN [] ← PW.IncludeInCell[obj, slash, [l-l/4, 0]];

The structured wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, wire,

PW.IncludeInCell[obj, CDRects.CreateRect[[9*l/2, l/2], CD.commentLayer], [0, 2*l]]

];

The composed wires

FOR i: NAT IN [0 .. size) DO

wire[i] ← CoreOps.CreateWire[];

ENDLOOP;

The text

[] ← PW.IncludeInCell[obj, CDTexts.CreateText[IO.PutR1[IO.int[size]], font], [2*l, -3*l/4]];

CDProperties.PutObjectProp[obj, $BusSize, NEW [INT ← size]];

CDProperties.PutObjectProp[obj, Sisyph.sisyphMode.extractProcProp, $WireIconsExtractBus];

PW.SetInterestRect[obj, [9*l/2, 9*l/2]];

PW.RepositionCell[obj];

};

Bus: PW.UserProc = {

slash: CD.Object;

int: INT ← PW.RequestInt["Size of the bus? "];

IF int<1 THEN RETURN;

slash ← CDDirectory.Fetch[design, ":SlashForBusIcon"].object;

IF slash=NIL THEN {

slash ← MakeSlash[];

[] ← CDDirectory.Include[design, slash, ":SlashForBusIcon"];

};

name ← IO.PutFR[":Bus[%g].icon", IO.int[int]];

ob ← CDDirectory.Fetch[design, name].object;

IF ob=NIL THEN {

ob ← MakeBus[NAT [int], slash].obj;

[] ← CDDirectory.Include[design, ob, name];

};

ExtractBus: Sinix.ExtractProc = {

refNat: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $BusSize]];

size: NAT ← NAT [refNat^];

result ← MakeBus[size].wire;

};

Extractor icon

MakeExtractor: PUBLIC PROC [index, size: NAT] RETURNS [wire: Wire, obj: CD.Object] = {

wire ← CoreOps.CreateWires[size: size];

The composed wires

FOR i: NAT IN [0 .. size) DO wire[i] ← CoreOps.CreateWire[] ENDLOOP;

obj ← PW.CreateEmptyCell[];

The structured wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, wire,

PW.IncludeInCell[obj, CDRects.CreateRect[[9*l/2, l/2], CD.commentLayer], [0, 2*l]]

];

The extracted wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, wire[index],

PW.IncludeInCell[obj, CDRects.CreateRect[[l/2, 3*l/2], CD.commentLayer], [2*l, 0]]

];

The square

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[3*l/2, l/8], CD.commentLayer], [l, 3*l/2]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[3*l/2, l/8], CD.commentLayer], [l, 3*l]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l/8, 3*l/2], CD.commentLayer], [l, 3*l/2]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l/8, 3*l/2], CD.commentLayer], [19*l/8, 13*l/8]];

The texts

[] ← PW.IncludeInCell[obj, CDTexts.CreateText[IO.PutR1[IO.int[index]], font], [5*l/2, -3*l/4]];

[] ← PW.IncludeInCell[obj, CDTexts.CreateText[IO.PutR1[IO.int[size]], font], [5*l/2, 2*l]];

CDProperties.PutObjectProp[obj, $ExtractorIndex, NEW [INT ← index]];

CDProperties.PutObjectProp[obj, $ExtractorSize, NEW [INT ← size]];

CDProperties.PutObjectProp[obj, Sisyph.sisyphMode.extractProcProp, $WireIconsExtractExtractor];

PW.SetInterestRect[obj, [9*l/2, 7*l/2]];

PW.RepositionCell[obj];

};

Extractor: PW.UserProc = {

int: INT ← PW.RequestInt["Index of the extracted wire? "];

int2: INT ← PW.RequestInt["Size of the structured wire? "];

IF int<0 OR int2<1 OR int>=int2 THEN RETURN;

name ← IO.PutFR[":Extractor[%g, %g].icon", IO.int[int], IO.int[int2]];

ob ← CDDirectory.Fetch[design, name].object;

IF ob=NIL THEN {

ob ← MakeExtractor[NAT [int], NAT [int2]].obj;

[] ← CDDirectory.Include[design, ob, name];

};

ExtractExtractor: Sinix.ExtractProc = {

refNat: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ExtractorIndex]];

refNat2: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ExtractorSize]];

index: NAT ← NAT [refNat^];

size: NAT ← NAT [refNat2^];

result ← MakeExtractor[index, size].wire;

};

Range Extractor icon

MakeRangeExtractor: PUBLIC PROC [index, subSize, size: NAT] RETURNS [wire: Wire, obj: CD.Object] = {

We create an extra level of hierarchy in the wires to extract things properly

structWire: Wire ← CoreOps.CreateWires[size: size];

subWire: Wire ← CoreOps.CreateWires[size: subSize];

wire ← CoreOps.CreateWire[LIST [subWire, structWire]];

The composed wires

FOR i: NAT IN [0 .. size) DO structWire[i] ← CoreOps.CreateWire[] ENDLOOP;

FOR i: NAT IN [0 .. subSize) DO subWire[i] ← structWire[i+index] ENDLOOP;

obj ← PW.CreateEmptyCell[];

The structured wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, structWire,

PW.IncludeInCell[obj, CDRects.CreateRect[[19*l/2, l/2], CD.commentLayer], [0, 2*l]]

];

The extracted wire

Sinix.AddPinsProp[

Sisyph.sisyphMode, subWire,

PW.IncludeInCell[obj, CDRects.CreateRect[[l, 3*l/2], CD.commentLayer], [5*l/2, 0]]

];

The rectangle

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[5*l/2, l/8], CD.commentLayer], [l, 3*l/2]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[5*l/2, l/8], CD.commentLayer], [l, 3*l]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l/8, 3*l/2], CD.commentLayer], [l, 3*l/2]];

[] ← PW.IncludeInCell[obj, CDRects.CreateRect[[l/8, 3*l/2], CD.commentLayer], [27*l/8, 13*l/8]];

The texts

[] ← PW.IncludeInCell[obj, CDTexts.CreateText[IO.PutFR["%g/%g", IO.int[index], IO.int[subSize]], font], [7*l/2, -3*l/4]];

[] ← PW.IncludeInCell[obj, CDTexts.CreateText[IO.PutR1[IO.int[size]], font], [7*l/2, 2*l]];

CDProperties.PutObjectProp[obj, $ExtractorIndex, NEW [INT ← index]];

CDProperties.PutObjectProp[obj, $ExtractorSubSize, NEW [INT ← subSize]];

CDProperties.PutObjectProp[obj, $ExtractorSize, NEW [INT ← size]];

CDProperties.PutObjectProp[obj, Sisyph.sisyphMode.extractProcProp, $WireIconsExtractRangeExtractor];

PW.SetInterestRect[obj, [19*l/2, 7*l/2]];

PW.RepositionCell[obj];

};

RangeExtractor: PW.UserProc = {

int: INT ← PW.RequestInt["Index of the extracted wire? "];

int2: INT ← PW.RequestInt["Size of the extracted wire? "];

int3: INT ← PW.RequestInt["Size of the structured wire? "];

IF int<0 OR int2<1 OR int3<1 OR int>=int3 OR int+int2>int3 THEN RETURN;

name ← IO.PutFR[":RangeExtractor[%g/%g, %g].icon", IO.int[int], IO.int[int2], IO.int[int3]];

ob ← CDDirectory.Fetch[design, name].object;

IF ob=NIL THEN {

ob ← MakeRangeExtractor[NAT [int], NAT [int2], NAT [int3]].obj;

[] ← CDDirectory.Include[design, ob, name];

};

ExtractRangeExtractor: Sinix.ExtractProc = {

refNat: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ExtractorIndex]];

refNat2: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ExtractorSubSize]];

refNat3: REF INT ← NARROW [CDProperties.GetObjectProp[obj, $ExtractorSize]];

index: NAT ← NAT [refNat^];

subSize: NAT ← NAT [refNat2^];

size: NAT ← NAT [refNat3^];

result ← MakeRangeExtractor[index, subSize, size].wire;

};

Initialization

PW.Register[Composer, "Composer"];

Sinix.RegisterExtractProc[$WireIconsExtractComposer, ExtractComposer];

PW.Register[Bus, "Bus"];

Sinix.RegisterExtractProc[$WireIconsExtractBus, ExtractBus];

PW.Register[Extractor, "Extractor"];

Sinix.RegisterExtractProc[$WireIconsExtractExtractor, ExtractExtractor];

PW.Register[RangeExtractor, "Range Extractor"];

Sinix.RegisterExtractProc[$WireIconsExtractRangeExtractor, ExtractRangeExtractor];

END.