Sch.mesa
Copyright © 1986 by Xerox Corporation. All rights reserved.
Louis Monier February 13, 1986 3:44:51 pm PST
Barth, April 17, 1986 11:15:16 am PST
Last Edited by: Louis Monier August 7, 1986 7:45:09 pm PDT
Pradeep Sindhu November 15, 1986 11:47:28 pm PST
DIRECTORY Core, CoreCreate, Ports, Rosemary, Sisyph;
Sch: CEDAR DEFINITIONS = BEGIN
ROPE: TYPE = Core.ROPE;
CellType: TYPE = Core.CellType;
Wire: TYPE = Core.Wire;
Wires: TYPE = Core.Wires;
PA: TYPE = CoreCreate.PA;
WR: TYPE = CoreCreate.WR;
Context: TYPE = Sisyph.Context;
XorY: TYPE = {X, Y, RX, RY};
Sch: PROC [cx: Context, name: ROPE];
Icon: PROC [cx: Context, name: ROPE] RETURNS [ct: CellType];
Orient: PROC [cx: Context, atom: ATOM] RETURNS [ct: CellType];
$FlipX, $FlipY, $Rot90, $Rot180, $Rot270
CSeq: PROC [cx: Context, count: NAT, dir: XorY] RETURNS [ct: CellType];
CSeqOb: PROC [obName: ROPE, cx: Context, count: NAT, dir: XorY] RETURNS [ct: CellType];
CStitch: PROC [cx: Context, count: NAT, dir: XorY] RETURNS [ct: CellType];
CStitchOb: PROC [obName: ROPE, cx: Context, count: NAT, dir: XorY] RETURNS [ct: CellType];
WSeq: PROC [name: ROPENIL, size: NAT] RETURNS [wire: Wire];
WRange: PROC [name: ROPE, start: NAT, size: NAT] RETURNS [wire: Wire];
WIndex: PROC [name: ROPE, index: NAT] RETURNS [wire: Wire];
InitPort: PROC [cx: Context, initType: Ports.LevelType ← b, initDrive: Ports.Drive ← none];
TSize: PROC [cx: Context, size: Rosemary.TransistorSize];
SetWire: PROC [cx: Context, level: Ports.Level ← L, size: Rosemary.WireSize ← charge];
END.