DIRECTORY CD USING [Design], Core, Boole, CoreCreate USING [PA, WR], Rope USING [ROPE]; BooleCore: CEDAR DEFINITIONS = BEGIN Expression: TYPE = Boole.Expression; Variable: TYPE = Boole.Variable; ROPE: TYPE = Rope.ROPE; CellType: TYPE = Core.CellType; Properties: TYPE = Core.Properties; Wire: TYPE = Core.Wire; Wires: TYPE = Core.Wires; WR: TYPE = CoreCreate.WR; PA: TYPE = CoreCreate.PA; EqualInt: PROC [wire: Wire, int: INT] RETURNS [expr: Expression]; InputRec: TYPE = RECORD [ input: WR, driver: CellType, pas: LIST OF PA _ NIL ]; OutputRec: TYPE = RECORD [ output: WR, expr: Expression, driver: CellType, pas: LIST OF PA _ NIL ]; Inputs: TYPE = LIST OF InputRec; Outputs: TYPE = LIST OF OutputRec; AlpsCell: PROC [public: Wire, inputs: Inputs, outputs: Outputs, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [recordCell: CellType]; GetCellLibrary: PROC RETURNS [cellLibrary: CD.Design]; GetCellLibraryCell: PROC [name: ROPE] RETURNS [CellType _ NIL]; END. DBooleCore.mesa Copyright c 1985, 1986 by Xerox Corporation. All rights reversed. Created by Bertrand Serlet August 13, 1985 5:38:56 pm PDT Bertrand Serlet March 2, 1987 7:59:48 pm PST Louis Monier April 8, 1986 11:54:49 am PST Common Types Connection with Core Returns the expression so that the atomic wires of wire express in binary the quantity int. Generation of Cascode Layout (Alps style) The public of driver must contain an atomic wire named "Input", and a structured wire named "Output", with 2 components named "Plus" and "Minus". The layout of the driver must be a cell of BooleLibrary. Inter driver communication (such as "Gnd" or "Vdd") should not appear in pas. In effect, pas should only contain the input-dependent bindings (such as "Clock", "PhiA"). The public of driver must contain a structured wire named "Input", with 2 components named "Plus" and "Minus", and an atomic wire named "Output". The layout of the driver must be a cell of BooleLibrary. Inter driver communication (such as "Gnd" or "Vdd") should not appear in pas. In effect, pas should only contain the output-dependent bindings (such as "Clock", "PhiA"). expr variables should be wires (of type Core.Wire) found in inputs. The returned recordCell contains all the given drivers as instances, plus a bunch of instances of class alpsClass, that are simulable with Rosemary. Public should contain two wires called "Gnd" and "Vdd" that are the power supply. Order of inputs gives the order of the input variables (left to right). Order of outputs gives the order of the outputs (bottom to top). The property $ContactPolyMetal2 (if present in props) is a REF INT specifying how often the layout has poly-metal2 contacts (in line units). Read from BooleLibrary.dale Read a schematics from BooleLibrary.dale Suffix ".sch" is added by GetCellLibraryCell. Κs˜– "Cedar" stylešœ™Jšœ Οmœ7™BJ™9J™,Icode™*—J˜šΟk œ˜ Jšžœžœ#žœžœžœžœžœ˜M—J˜JšΠbn œžœž œž˜$head™ Jšœ žœ˜$Jšœ žœ˜ Jšžœžœžœ˜Jšœ žœ˜Jšœ žœ˜#Jšœžœ ˜Jšœžœ˜Jšžœžœžœ˜Jšžœžœžœ˜—™šΟnœžœžœžœ˜AJšœ]™]——™)šœ žœžœ˜Jš œžœžœžœžœž˜2Jšœ˜Jšœψ™ψJ™—šœ žœžœ˜Jš œžœ+žœžœžœž˜EJšœ˜Jšœω™ωJšœC™CJ˜—Jšœžœžœžœ ˜ šœ žœžœžœ ˜"J˜—š  œžœ8žœžœžœžœ˜ŠJšœ•™•J™QJšœG™GJšœ@™@J™ŽJ™—š œžœžœžœ ˜6Jšœ™J™—š  œžœžœžœ žœ˜?Jšœ(™(Jšœ-™-J™——Jšžœ˜—…—Μ ƒ