DIRECTORY CD, CDCells, CDDirectory, CDIO, Core, CoreClasses, CoreCompose, CoreOps, CoreProperties, Rope, SCTestUtil, TerminalIO, SC; SCTestUtilImpl: CEDAR PROGRAM IMPORTS CDCells, CDDirectory, CDIO, CoreClasses, CoreCompose, CoreOps, CoreProperties, Rope, SC, TerminalIO EXPORTS SCTestUtil = BEGIN CreateInstance: PUBLIC PROC [context: CoreCompose.Context, actual: Rope.ROPE, type: Core.CellType, name: Rope.ROPE] RETURNS [instance: CoreClasses.CellInstance] = { instance _ NEW[CoreClasses.CellInstanceRec _ [CoreCompose.CreateWires[context, actual], type, NIL]]; CoreProperties.PutCellInstanceProp[instance, CoreClasses.instanceNameProp, name]}; CreateRecordCell: PUBLIC PROC [context: CoreCompose.Context, name: Rope.ROPE, public: Core.WireSequence, onlyInternal: Core.WireSequence _ NIL, instances: CoreClasses.CellInstanceList _ NIL] RETURNS [cellType: Core.CellType] = { internal: Core.WireSequence _ WireUnion[public, onlyInternal]; recCell: CoreClasses.RecordCellType _ NEW [CoreClasses.RecordCellTypeRec _ [ internal: internal, instances: instances]]; cellType _ CoreOps.CreateCellType[ name: name, class: CoreClasses.recordCellClass, public: public, data: recCell]; }; WireUnion: PUBLIC PROC [w1, w2: Core.WireSequence] RETURNS [union: Core.WireSequence] = { IF w1=NIL THEN RETURN [w2]; IF w2=NIL THEN RETURN [w1]; union _ NEW [Core.WireSequenceRec[w1.size+w2.size]]; FOR i: INT IN [0..w1.size) DO union[i] _ w1[i] ENDLOOP; FOR i: INT IN [0..w2.size) DO union[i+w1.size] _ w2[i] ENDLOOP; }; AppendInstList: PUBLIC PROC [l1, l2: CoreClasses.CellInstanceList] RETURNS[val: CoreClasses.CellInstanceList] = { z: CoreClasses.CellInstanceList _ NIL; val _ l2; IF l1 = NIL THEN RETURN[val]; val _ CONS[l1.first, val]; z _ val; UNTIL (l1 _ l1.rest) = NIL DO z.rest _ CONS[l1.first, z.rest]; z _ z.rest; ENDLOOP; RETURN[val]; }; WriteLayout: PUBLIC PROC [result: SC.Result, design: CD.Design] = BEGIN [] _ CDCells.IncludeOb[design: design, cell: NIL, ob: result.object, position: [0, 0], orientation: CD.original, cellCSystem: interrestCoords, obCSystem: interrestCoords, mode: dontPropagate]; IF CDIO.WriteDesign[design, result.handle.name] THEN BEGIN newCellName: Rope.ROPE _ CDDirectory.Name[result.object]; IF ~Rope.Equal[result.handle.name, newCellName] THEN TerminalIO.WriteRope[Rope.Cat["cell name changed to: ", newCellName, "\n"]]; END ELSE TerminalIO.WriteRope["Error: design not written\n"]; END; DoLayout: PUBLIC PROC [context: CoreCompose.Context, cellType: Core.CellType, cdDesign, libDesign: CD.Design, hMaterial, vMaterial: Rope.ROPE] RETURNS [result: SC.Result _ NIL] = BEGIN rules: SC.DesignRules _ SC.CreateDesignRules[cdDesign.technology.key, hMaterial, vMaterial, horizontal]; handle: SC.Handle _ SC.CreateHandle[context, cellType, cdDesign, libDesign, rules, "SCTest"]; SC.InitialPlace[handle, 0]; SC.GlobalRoute[handle]; result _ SC.DetailRoute[handle]; END; END. \SCTestUtilImpl.mesa Copyright c 1985, 1986 by Xerox Corporation. All rights reserved. Bryan Preas, March 24, 1986 6:05:04 pm PST create a cell instance rec create a cell instance rec w1.elements#NIL and w2.elements#NIL Write a standard cell object to a CND design Create a standard cell object SC.PlaceImprove[handle, $globalRouting]; Κ’˜šœ™Jšœ Οmœ7™BJšœ+™+—J˜šΟk ˜ J˜J˜Jšœ ˜ Jšžœ˜J˜J˜ Jšœ ˜ J˜J˜Jšœ˜Jšœ ˜ Jšœ ˜ Jšœ˜—J˜šœžœžœ˜JšžœžœI˜kJšžœ ˜Jšž˜Icode˜š Οnœž œ-žœ"žœžœ)˜€J™J™Jšœ žœPžœ˜dJšœR˜RJ˜—š Ÿœž œ+žœ?žœ,žœžœ˜δJ™J™Kšœ>˜>šœ&žœ#˜LKšœ˜Kšœ˜—šœ"˜"Kšœ ˜ Kšœ#˜#Kšœ˜Kšœ˜—K˜J˜—Kšœ žœž™#šŸ œž œžœ˜YKšžœžœžœžœ˜Kšžœžœžœžœ˜Kšœžœ)˜4Kš žœžœžœžœžœ˜8Kš žœžœžœžœžœ˜@K˜—K˜šŸœžœžœ'˜BKšžœ'˜.Kšœ"žœ˜&K˜ Kšžœžœžœžœ˜Kšœžœ˜K˜šžœžœž˜Kšœ žœ˜ K˜ Kšžœ˜—Kšžœ˜ Kšœ˜K˜—šŸ œž œ žœžœ ˜AJšœ,™,J™Jšž˜šœ'˜'Jšœ=žœ ˜JJšœO˜O—šžœžœ*ž˜5Jšž˜Jšœžœ#˜9šžœ.ž˜4JšœL˜L—Jšž˜—šž˜J˜4—Jšžœ˜J˜—š Ÿœž œNžœ*žœ žœ žœ˜²Jšœ™J˜Jšž˜JšœžœžœN˜hJšœžœ žœG˜]Jšžœ˜Jšžœ˜Jšœ(™(Jšœ žœ˜ šžœ˜J˜——Jšžœ˜—J˜J˜J˜J˜—…— `^