-- File: FSMTest.mesa - Created by SETAR 23-Dec-85 14:31:51
-- Frank Bowers December 23, 1985 3:31:10 pm PST

DIRECTORY
Core,
CoreClasses,
CoreCompose,
CoreOps,
CoreProperties,
Rope,
SCTestCore;

FSMTest: CEDAR PROGRAM

IMPORTS CoreClasses, CoreCompose, CoreOps, CoreProperties
EXPORTS SCTestCore =

BEGIN

CellInstance: TYPE = CoreClasses.CellInstance;

CreateInstance: PROC [context: CoreCompose.Context, actual: Rope.ROPE, type: Core.CellType, name: Rope.ROPE] RETURNS [instance: CellInstance] = {
instance ← NEW[CoreClasses.CellInstanceRec ← [CoreCompose.CreateWires[context, actual], type, NIL]];
CoreProperties.PutCellInstanceProp[instance, CoreClasses.instanceNameProp, name]};

CreateRecordCell: PROC [context: CoreCompose.Context, name: Rope.ROPE, public: Core.WireSequence, onlyInternal: Core.WireSequence ← NIL, instances: CoreClasses.CellInstanceList ← NIL] RETURNS [cellType: Core.CellType] = {
internal: Core.WireSequence ← WireUnion[public, onlyInternal];
recCell: CoreClasses.RecordCellType ← NEW [CoreClasses.RecordCellTypeRec ← [internal: internal, instances: instances]];
cellType ← CoreOps.CreateCellType[
name: name,
class: CoreClasses.recordCellClass,
public: public,
data: recCell];
};

WireUnion: PROC [w1, w2: Core.WireSequence] RETURNS [union: Core.WireSequence] = {
IF w1=NIL THEN RETURN [w2];
IF w2=NIL THEN RETURN [w1];
union ← NEW [Core.WireSequenceRec[w1.size+w2.size]];
FOR i: INT IN [0..w1.size) DO union[i] ← w1[i] ENDLOOP;
FOR i: INT IN [0..w2.size) DO union[i+w1.size] ← w2[i] ENDLOOP;
};

CreateCore: PUBLIC PROC [] RETURNS [CoreCompose.Context, Core.CellType] = BEGIN
  context: CoreCompose.Context ← CoreCompose.CreateContext[];
  c1IV00BWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "I, X, Vdd, Gnd"];
  c1IV00B: Core.CellType ← CreateRecordCell[context, "C1IV00B", c1IV00BWires, NIL, NIL];
  c1AN02AWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, X, Vdd, Gnd"];
  c1AN02A: Core.CellType ← CreateRecordCell[context, "C1AN02A", c1AN02AWires, NIL, NIL];
  c1NO02BWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, X, Vdd, Gnd"];
  c1NO02B: Core.CellType ← CreateRecordCell[context, "C1NO02B", c1NO02BWires, NIL, NIL];
  c1NO03BWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, X, IXC, Vdd, Gnd"];
  c1NO03B: Core.CellType ← CreateRecordCell[context, "C1NO03B", c1NO03BWires, NIL, NIL];
  c1NA03AWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, IXC, X, Vdd, Gnd"];
  c1NA03A: Core.CellType ← CreateRecordCell[context, "C1NA03A", c1NA03AWires, NIL, NIL];
  c1OR02AWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, X, Vdd, Gnd"];
  c1OR02A: Core.CellType ← CreateRecordCell[context, "C1OR02A", c1OR02AWires, NIL, NIL];
  c1NO04BWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "IXA, IXB, IXC, IXD, X, Vdd, Gnd"];
  c1NO04B: Core.CellType ← CreateRecordCell[context, "C1NO04B", c1NO04BWires, NIL, NIL];
  c1IV00BInst128: CellInstance ← CreateInstance[context, "RENA, w131, Vdd, Gnd", c1IV00B, "c1IV00BInst128"];
  c1IV00BInst126: CellInstance ← CreateInstance[context, "Contention, w127, Vdd, Gnd", c1IV00B, "c1IV00BInst126"];
  c1IV00BInst113: CellInstance ← CreateInstance[context, "FD, w125, Vdd, Gnd", c1IV00B, "c1IV00BInst113"];
  c1IV00BInst109: CellInstance ← CreateInstance[context, "EOP, w108, Vdd, Gnd", c1IV00B, "c1IV00BInst109"];
  c1IV00BInst100: CellInstance ← CreateInstance[context, "SD1, w102, Vdd, Gnd", c1IV00B, "c1IV00BInst100"];
  c1IV00BInst96: CellInstance ← CreateInstance[context, "Select, w98, Vdd, Gnd", c1IV00B, "c1IV00BInst96"];
  c1IV00BInst94: CellInstance ← CreateInstance[context, "Start, w81, Vdd, Gnd", c1IV00B, "c1IV00BInst94"];
  c1IV00BInst90: CellInstance ← CreateInstance[context, "Act, w78, Vdd, Gnd", c1IV00B, "c1IV00BInst90"];
  c1IV00BInst85: CellInstance ← CreateInstance[context, "Don, w75, Vdd, Gnd", c1IV00B, "c1IV00BInst85"];
  c1IV00BInst83: CellInstance ← CreateInstance[context, "SF, w72, Vdd, Gnd", c1IV00B, "c1IV00BInst83"];
  c1AN02AInst66: CellInstance ← CreateInstance[context, "w67, w68, w69, Vdd, Gnd", c1AN02A, "c1AN02AInst66"];
  c1NO02BInst65: CellInstance ← CreateInstance[context, "SX, w127, w68, Vdd, Gnd", c1NO02B, "c1NO02BInst65"];
  c1NO03BInst60: CellInstance ← CreateInstance[context, "w61, w64, w70, w69, Vdd, Gnd", c1NO03B, "c1NO03BInst60"];
  c1AN02AInst59: CellInstance ← CreateInstance[context, "w62, w63, w64, Vdd, Gnd", c1AN02A, "c1AN02AInst59"];
  c1IV00BInst53: CellInstance ← CreateInstance[context, "w81, w55, Vdd, Gnd", c1IV00B, "c1IV00BInst53"];
  c1NA03AInst50: CellInstance ← CreateInstance[context, "w78, w127, w131, w51, Vdd, Gnd", c1NA03A, "c1NA03AInst50"];
  c1OR02AInst43: CellInstance ← CreateInstance[context, "w55, w54, w56, Vdd, Gnd", c1OR02A, "c1OR02AInst43"];
  c1OR02AInst42: CellInstance ← CreateInstance[context, "w45, w44, w47, Vdd, Gnd", c1OR02A, "c1OR02AInst42"];
  c1NO02BInst39: CellInstance ← CreateInstance[context, "w52, w51, w54, Vdd, Gnd", c1NO02B, "c1NO02BInst39"];
  c1NO02BInst38: CellInstance ← CreateInstance[context, "w41, w40, w46, Vdd, Gnd", c1NO02B, "c1NO02BInst38"];
  c1AN02AInst35: CellInstance ← CreateInstance[context, "w36, w37, w40, Vdd, Gnd", c1AN02A, "c1AN02AInst35"];
  c1AN02AInst16: CellInstance ← CreateInstance[context, "w56, w70, StartOutput, Vdd, Gnd", c1AN02A, "c1AN02AInst16"];
  c1AN02AInst15: CellInstance ← CreateInstance[context, "w47, w46, SelectOutput, Vdd, Gnd", c1AN02A, "c1AN02AInst15"];
  c1AN02AInst14: CellInstance ← CreateInstance[context, "w17, w18, SD1Output, Vdd, Gnd", c1AN02A, "c1AN02AInst14"];
  c1NO04BInst13: CellInstance ← CreateInstance[context, "SD1, w98, w81, w108, w36, Vdd, Gnd", c1NO04B, "c1NO04BInst13"];
  c1NO03BInst12: CellInstance ← CreateInstance[context, "w81, SD1, w67, w98, Vdd, Gnd", c1NO03B, "c1NO03BInst12"];
  c1NO03BInst11: CellInstance ← CreateInstance[context, "w125, Act, w63, Contention, Vdd, Gnd", c1NO03B, "c1NO03BInst11"];
  c1NO03BInst10: CellInstance ← CreateInstance[context, "w125, Act, w37, Contention, Vdd, Gnd", c1NO03B, "c1NO03BInst10"];
  c1NO03BInst9: CellInstance ← CreateInstance[context, "Select, w81, w45, w102, Vdd, Gnd", c1NO03B, "c1NO03BInst9"];
  c1NO03BInst8: CellInstance ← CreateInstance[context, "w98, w81, w44, SD1, Vdd, Gnd", c1NO03B, "c1NO03BInst8"];
  c1NO03BInst7: CellInstance ← CreateInstance[context, "SD1, w81, w18, Select, Vdd, Gnd", c1NO03B, "c1NO03BInst7"];
  c1NO04BInst6: CellInstance ← CreateInstance[context, "w81, SD1, Select, RENA, w62, Vdd, Gnd", c1NO04B, "c1NO04BInst6"];
  c1NO04BInst5: CellInstance ← CreateInstance[context, "w81, SD1, Select, SX, w61, Vdd, Gnd", c1NO04B, "c1NO04BInst5"];
  c1NO04BInst4: CellInstance ← CreateInstance[context, "Start, SD1, Select, SX, w52, Vdd, Gnd", c1NO04B, "c1NO04BInst4"];
  c1NO04BInst3: CellInstance ← CreateInstance[context, "SD1, Select, w81, SX, w41, Vdd, Gnd", c1NO04B, "c1NO04BInst3"];
  c1NO04BInst2: CellInstance ← CreateInstance[context, "w72, w75, w78, SX, w17, Vdd, Gnd", c1NO04B, "c1NO04BInst2"];
  pubWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "SD1Output, SF, Don, Act, SX, SD1, Start, Select, SelectOutput, StartOutput, EOP, FD, Contention, RENA, Vdd, Gnd"];
  privWires: CoreCompose.WireSequence ← CoreCompose.CreateWires[context, "w131, w127, w125, w108, w102, w98, w81, w78, w75, w72, w70, w69, w68, w67, w64, w63, w62, w61, w56, w55, w54, w52, w51, w47, w46, w45, w44, w41, w40, w37, w36, w18, w17"];
  FSMTest: Core.CellType ← CreateRecordCell[context, "FSMTest", pubWires, privWires, LIST[c1IV00BInst128, c1IV00BInst126, c1IV00BInst113, c1IV00BInst109, c1IV00BInst100, c1IV00BInst96, c1IV00BInst94, c1IV00BInst90, c1IV00BInst85, c1IV00BInst83, c1AN02AInst66, c1NO02BInst65, c1NO03BInst60, c1AN02AInst59, c1IV00BInst53, c1NA03AInst50, c1OR02AInst43, c1OR02AInst42, c1NO02BInst39, c1NO02BInst38, c1AN02AInst35, c1AN02AInst16, c1AN02AInst15, c1AN02AInst14, c1NO04BInst13, c1NO03BInst12, c1NO03BInst11, c1NO03BInst10, c1NO03BInst9, c1NO03BInst8, c1NO03BInst7, c1NO04BInst6, c1NO04BInst5, c1NO04BInst4, c1NO04BInst3, c1NO04BInst2]];
  RETURN[context, FSMTest];
  END;

END.