DIRECTORY CD, Core, CoreClasses, CoreFlat, CoreOps, CoreProperties, CStitching, SinixCMos, Static; StaticImpl: CEDAR PROGRAM IMPORTS CoreClasses, CoreFlat, CoreOps, CoreProperties, CStitching, SinixCMos EXPORTS Static = BEGIN OPEN Static; StaticLayers: TYPE = {overglasscut, met2, via, met1, contact, poly, ndif, pdif, ncon, pcon}; StaticLayersRefs: ARRAY StaticLayers OF LayersInRect; LayersInRect: TYPE = REF LayersInRectRec; LayersInRectRec: TYPE = RECORD [ bits: PACKED ARRAY StaticLayers OF BOOL]; CornerStitchWire: PUBLIC PROC [root: Core.CellType, wire: Core.Wire] RETURNS [tesselation: CStitching.Tesselation] = { AddWireGeometry: CoreFlat.EachInternalWireProc = { }; AddTransistorGeometry: CoreFlat.EachWireInstanceProc = { basic: Core.CellType _ CoreOps.ToBasic[instance.type]; IF basic.class=CoreClasses.transistorCellClass THEN { geometry: CD.Instance _ NARROW[CoreProperties.GetCellInstanceProp[ instance, instanceProp]]; }; }; wireGeometryProp: ATOM = SinixCMos.extractBMode.wireGeometryProp; instanceProp: ATOM = SinixCMos.extractBMode.instanceProp; tesselation _ CStitching.NewTesselation[]; CoreFlat.EnumerateAtomicWireLeaves[root: root, rootWire: wire, eachInternalWire: AddWireGeometry, eachWireInstance: AddTransistorGeometry]; }; END. ˜StaticImpl.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Barth, April 14, 1986 10:27:46 am PST Operations InsertWireRectangle: CStitching.RectProc = { IF this rect does not have currentInstance.layer bit set THEN { CStitching.ChangeRect[plane: plane, rect: rect, new: ?]; }; }; geometry: LIST OF CD.Instance _ NARROW[CoreProperties.GetWireProp[wire, wireGeometryProp]]; currentInstance: CD.Instance _ NIL; FOR geom: LIST OF CD.Instance _ geometry, geom.rest UNTIL geom=NIL DO currentInstance _ geom.first; CStitching.ChangeEnumerateArea[plane: tesselation, rect: currentInstance.?, eachRect: InsertWireRectangle, skip: NIL]; ENDLOOP; Κ– "cedar" style˜codešœ™Kšœ Οmœ1™˜\K˜—K˜K˜—Kšœžœ+˜AKšœžœ'˜9Kšœ*˜*Kšœ‹˜‹K˜K˜——Kšžœ˜—…—ξ €