<> <> <> <> <> DIRECTORY Rope; IMSTester: CEDAR DEFINITIONS = BEGIN <> <> <> <> ROPE: TYPE = Rope.ROPE; NSec: TYPE = INT; ForceGroups: TYPE = LIST OF ForceGroup; ForceGroup: TYPE = REF ForceGroupRec; ForceGroupRec: TYPE = RECORD [ name: ROPE, channels: Channels, hiDrive: REAL, -- only if programable driver loDrive: REAL]; -- only if programable driver AcquireGroups: TYPE = LIST OF AcquireGroup; AcquireGroup: TYPE = REF AcquireGroupRec; AcquireGroupRec: TYPE = RECORD [ name: ROPE, channels: Channels, sample: NSec, threshold: REAL]; -- only if programable receiver CompareGroups: TYPE = LIST OF CompareGroup; CompareGroup: TYPE = REF CompareGroupRec; CompareGroupRec: TYPE = RECORD [ name: ROPE, channels: Channels]; Channels: TYPE = LIST OF Channel; Channel: TYPE = RECORD [ module: Module, podChannelA: PodChannel, podChannelB: PodChannel]; Module: TYPE = RECORD[ slot: SlotNumber, buffer: BufferNumber]; SlotNumber: TYPE = [1..48]; -- Each module slot in the IMS mainframe is numbered 1 through 12, starting with the master and continuing up to a maximum of three slaves. BufferNumber: TYPE = [0..7); -- Current number of purchased Force/Acquire board pairs. PodChannel: TYPE = RECORD [ chanData: CData, format: FormatType, timing: TData, ]; CData: TYPE = RECORD [ chanNumber: TYPE = [0..8), signalName: ROPE, devicePinName: ROPE ]; TData: TYPE = RECORD [ timing: BOOL, delay: NSec, -- only if format is NRZ width: NSec, -- only if format is NRZ ]; <> FormatType: TYPE = {NRZ, DNRZ, RZ, R1, RC, RI}; Buffer: TYPE = REF BufferRec; BufferRec: TYPE = RECORD[cycles: SEQUENCE cycle: Cycle OF CycleData]; Cycle: TYPE = [0..16*1024); CycleData: TYPE = REF CycleDataRec; CycleDataRec: TYPE = RECORD[eachCycle: ARRAY BufferNumber OF PACKED ARRAY PodChannel OF Data]; Data: TYPE = RECORD[ force: BOOL, inhibit: BOOL, expect: BOOL, ignore: BOOL]; Jumps: TYPE = LIST OF Jump; Jump: TYPE = RECORD [ source: Cycle, destination: Cycle]; Errors: TYPE = LIST OF Error; Error: TYPE = RECORD [ cycle: Cycle, group: AcquireGroup, channel: Channel, expected: BOOL, acquired: BOOL]; <> IMSError: SIGNAL [msg: ROPE]; RunDiagnostics: PROC [extended: BOOL _ TRUE]; <> Initialize: PROC; <> DefineGroups: PROC [forceGroups: ForceGroups, acquireGroups: AcquireGroups]; <> SetCyclePeriod: PROC [period: NSec]; SetIMSMemory: PROC [forceGroups: ForceGroups, buffer: Buffer, cycles: Cycle, halt: Cycle, jumps: Jumps _ NIL]; <> GetErrors: PROC [acquireGroups: AcquireGroups, maxErrors: NAT, startCycle: Cycle, lastCycle: Cycle] RETURNS [errors: Errors]; <> Start: PROC; Stop: PROC; Wait: PROC; -- waits for HALT instruction to be executed END.