DIRECTORY
CD USING [Design, Instance, Layer, Object, Position],
Core,
CoreClasses USING [CreateIdentity],
CoreCreate USING [PA],
PWPins USING [Side],
Sinix USING [Mode];
Global Variables
Some global variables are used for calling Sinix and Lichen. Yes, they should be parameters for all PWCore functions, but for now that is fine enough. Better rollback between changes, if you don't know what you are doing.
testLichen:
BOOL;
Defaulted to FALSE. TRUE means that graph isomorphism is attempted on Get.
checkAbuts:
BOOL;
Defaulted to FALSE. TRUE means that graph isomorphism is attempted on Abuts.
extractMode: Sinix.Mode;
Contains the mode that is to be passed to Sinix when doing extraction. Its default is SinixCMos.extractBMode and it can be changed to SinixCMos.checkBMode.
maskSuffix:
ROPE;
Contains the rope that is to be concatenated to the name of a cellType to find the name of the corresponding layout cell.
Primitive operations
LayoutProc:
TYPE =
PROC [cellType: CellType]
RETURNS [obj: Object];
obj is the layout for cellType.
Identical (REF equal) cellTypes must have the same (REF equal) layout, and the same layout must correspond to the same cellType. To follow this restriction, the Layout function automatically insert one level of indirection (Indirect object).
DecorateProc:
TYPE =
PROC [cellType: CellType, obj: Object];
Checks that obj is compatible with the source cellType, and decorates cellType with the geometric information derived from obj.
RegisterLayoutAtom:
PROC [layoutAtom:
ATOM, layoutProc: LayoutProc, decorateProc: DecorateProc]
RETURNS [sameAtom:
ATOM];
LayoutProcs are not directly accessible and must be associated with an atom. This allows delayed generation, description of the Core structure without the geometry, and lazy evaluation of the geometry to improve efficiency.
layoutAtomProp:
ATOM;
-- =$Layout. Property on cellTypes to specifies layoutAtoms
SetLayout:
PROC [cellType: CellType, layoutAtom:
ATOM, userDataProp:
ATOM ←
NIL, userData:
REF ←
NIL];
Attaches the atom as a property (layoutAtomProp) of the cell type.
If the user wants to supply some data, this data is stored under the property userDataProp on the cellType.
The implementation is the following:
CoreProperties.PutCellTypeProp[cellType, layoutAtomProp, layoutAtom];
IF userDataProp#NIL THEN CoreProperties.PutCellTypeProp[cellType, userDataProp, userData];
Layout:
PROC [cellType: CellType]
RETURNS [obj: Object];
Retrieves the layout corresponding to a cell type by:
1) fetching the layoutAtom (property layoutAtomProp),
2) finding the corresponding layoutProc and decorateProc,
3) evaluating layoutProc,
4) using the decorateProc to decorate the original cellType
5) returning an indirect object of obj with a special property to extract it as cellType.
The result is cached, so that means that called twice with the same (REF equal) cellType, Layout will produce the same (REF equal) obj.
To follow the restriction that the same layout can not correspond to two different cellTypes, Layout automatically inserts one level of indirection (Indirect object).
FromLayout:
PROC [public: Wire, obj:
CD.Object]
RETURNS [cellType: CellType];
This PROC is used to bypass most checks and get the Core description directly from the Layout using Sinix. Avoid using it!
FromLayoutWithoutPublic:
PROC [obj:
CD.Object]
RETURNS [cellType: CellType];
This PROC is used to bypass all checks and get the Core description directly from the Layout using Sinix. Really avoid using it!
Predefined layoutAtoms and their associated procs
$Get and $GetAndFlatten: expect a $PWCoreSourceDesign property [of type CD.Design] on the cellType. The cellType must be a recordCell. GetAndFlatten flattens the layout, so that corresponding transistors inter-cells are fused.
$AbutX, $AbutY, $ReverseAbutX, $ReverseAbutY: the cellType must be a recordCell.
$ArrayX, $ArrayY, $ReverseArrayX, $ReverseArrayY: the cellType must be a sequenceCell.
$FlipX, $FlipY, $Rot90, $Rot180, $Rot270: the cellType must be an identityCell.
$Recast: the cellType must have a Recast proc and the recasted cellType must have layout. This is the default for identity cellTypes.
Get: LayoutProc;
GetAndFlatten: LayoutProc;
AbutX: LayoutProc;
AbutY: LayoutProc;
ReverseAbutX: LayoutProc;
ReverseAbutY: LayoutProc;
ArrayX: LayoutProc;
ArrayY: LayoutProc;
ReverseArrayX: LayoutProc;
ReverseArrayY: LayoutProc;
FlipX: LayoutProc;
FlipY: LayoutProc;
Rot90: LayoutProc;
Rot180: LayoutProc;
Rot270: LayoutProc;
DecorateGet: DecorateProc;
DecorateAbutX: DecorateProc;
DecorateAbutY: DecorateProc;
DecorateReverseAbutX: DecorateProc;
DecorateReverseAbutY: DecorateProc;
DecorateRotated: DecorateProc;
Assumes that sourceCT is an identityCellClass and extractedCT a recordCell with a single instance.
DecorateRecasted: DecorateProc;
Only assumes that extractedCT and sourceCT have similar public.
OrderProc:
TYPE =
PROC [
CD.Position,
CD.Position]
RETURNS [
BOOL];
Returns TRUE if the first position is "before" the second
SortInX: OrderProc;
SortInY: OrderProc;
ReverseSortInX: OrderProc;
ReverseSortInY: OrderProc;
DecorateFlatten:
PROC [cellType: CellType, obj:
CD.Object, inOrder: OrderProc];
Assumes that cellType is a record Cell.
Extracts obj, flattens the result of the extraction (stopping for the cellTypes which have an associated layout), sorts the instances using inOrder, and assumes they match the instances of cellType.
SortInstances:
PROC [cellType: CellType, inOrder: OrderProc];
This function modifies physically the instances of cellType, by permuting the ith and the jth instance when inOrder (called with the positions of the instances) returns FALSE (for i<j).
Short cuts for the designer
SetGet:
PROC [cellType: CellType, source:
CD.Design] =
INLINE {SetLayout[cellType, $Get, $PWCoreSourceDesign, source]};
Fetches layout from a source design.
SetAbutX: PROC [cellType: CellType] = INLINE {SetLayout[cellType, $AbutX]};
SetAbutY:
PROC [cellType: CellType] =
INLINE {SetLayout[cellType, $AbutY]};
SetArrayX: PROC [cellType: CellType] = INLINE {SetLayout[cellType, $ArrayX]};
SetArrayY: PROC [cellType: CellType] = INLINE {SetLayout[cellType, $ArrayY]};
Creates an Identity cellType which layout is the same as the original, but rotated by orientation. Code is the following.
RotateCellType:
PROC [cellType: CellType, orientation:
ATOM]
RETURNS [rotatedCellType: CellType] =
INLINE {
rotatedCellType ← CoreClasses.CreateIdentity[cellType];
SetLayout[rotatedCellType, orientation];
};
Tentative help for regular structures
AbutInstance:
TYPE =
RECORD [object:
CD.Object, pas:
LIST
OF CoreCreate.
PA ←
NIL];
Object must be a layout cell with only atomic wires. There is no need to describe object by other means (it defines the truth!).
ATTENTION: pas should contain all bindings (no default binding when public and sub-publics have same name is happening)
AbutCell:
PROC [public: Wire, abutInstances:
LIST
OF AbutInstance, inX:
BOOL, shared:
BOOL ←
FALSE, name:
ROPE ←
NIL, props: Properties ←
NIL]
RETURNS [recordCell: CellType];
Abuts (in X or in Y depending on inX) the layout of the given abutInstances. Extracts the result using extractMode, and uses the pas (given in abutInstances) to deduce the correspondance between extracted wires and public wires.
The truth for this generated cellType comes soforth from the layout.
Boolean shared specifies which of PW.AbutList and PW.SharedAbutList should be used.
Help for writing routers
Pin should be understand, for the following functions, in the more general sense of segment of interface geometry. Min and Max refer to the interesting projection in X or Y (depending on the side of the pin), relatively to the InterestRect of the layout of the object. Note that the coordinate system is different from the one used in Sinix (which is the Outer coordinate system).
Side: TYPE = PWPins.Side; -- {bottom, right, top, left, none}; none side should not be given nor received as argument for all the following functions.
EnumerateWirePins:
PROC [cellType: CellType, eachWirePin: EachWirePinProc]
RETURNS [quit:
BOOL];
Enumerates all the interface geometry for the given cellType
EachWirePinProc: TYPE = PROC [wire: Wire, instance: CD.Instance, min, max: INT, side: Side, layer: CD.Layer] RETURNS [quit: BOOL ← FALSE];
EnumerateNonOverlappingWirePins:
PROC [cellType: CellType, eachWirePin: EachWirePinProc]
RETURNS [quit:
BOOL];
Enumerates all the interface geometry for the given cellType, but enumerates once only segments that overlap.
EnumeratePins:
PROC [cellType: CellType, wire: Wire, eachPin: EachPinProc]
RETURNS [quit:
BOOL];
Enumerates all the interface geometry for the given wire
EachPinProc: TYPE = PROC [instance: CD.Instance, min, max: INT, side: Side, layer: CD.Layer] RETURNS [quit: BOOL ← FALSE];
EnumerateSortedPins:
PROC [cellType: CellType, side: Side, eachSortedPin: EachSortedPinProc]
RETURNS [quit:
BOOL];
Enumerates all the interface geometry for the given cellType. Segments are given in increasing min order.
EachSortedPinProc: TYPE = PROC [wire: Wire, instance: CD.Instance, min, max: INT, layer: CD.Layer] RETURNS [quit: BOOL ← FALSE];