Uses: Accounting: Written Annotate: Contents Apply: Simulate Arbitrate: SimulationInfo Arc: Corner ArrayDefinition: DefineObject ArrayRelatedInfo: Interface ArrayUse: ArrayRelatedInfo Assign: Level1Ctl Block: Level2Ctl Body: Interface Boolean: Escape Redo Constraint Data BorderPattern: FigureGroupSpecification Build: FormalValue BuildName: FormalValue Cell: Library Color: FigureGroupSpecification Comment: LogicModel Contents ArrayRelatedInfo SignalGroup FigureGroup PortImplementation Body Apply Simulate Timing Interface View InstanceMap PortMap Property Design ViewMap Cell FigureGroupSpecification FigureGroupDefault SimulationMap NumberDefinition Technology Library ForEach Build Keyword Written Status EDIF Condition: LogicState Constraint: Level1Ctl Contents: View Coordinate: Step Place ScaleY ScaleX Point Width Corner: OpenShape Shape CriticalSignal: Contents Data: Property Default: Define Define: Contents Interface Technology DefineObject: DefineObjects DefineObjectsAux DefineObjects: Define DefineObjectsAux: DefineObjects Delay: Measured Required Timing Design: EDIF Direction: Define EDIFLevel: Status EDIFLevelName: EDIFLevel EDIFVersion: Status Escape: Level2Ctl Expression: ParameterValue ParameterValueAux Point FunctionApplication Assign Boolean Number WholeNumber Coordinate External: EDIF Extra: Keyword False: Boolean PrimitiveData Figure: FigureGroup FigureGroup: Wire Contents SignalGroup PortImplementation Body FigureGroupDefault: Technology FigureGroupRef: FigureGroup FigureGroupSpecification: FigureGroupRef FigureGroupDefault FillPattern: FigureGroupSpecification ForEach: ForEach Build Keyword Formal: Keyword FormalValue: ForEach Build Optional Keyword FunctionApplication: Expression Global: Contents GridMap: Technology IgnoreValue: Simulate Index: ForEach Build Instance: Section Contents SocketSet InstanceMap: ViewMap Interface: View Isolated: SimulationInfo Iterate: Level2Ctl Joined: Contents MustJoin WeakJoined Joined Interface Justify: Annotate KeyRef: Build Keyword: EDIF Level1Ctl: Contents Interface Technology Level2Ctl: Contents Interface ViewMap Technology Library: EDIF LogicInput: Apply LogicModel: Contents LogicOtherwise: LogicModel LogicOutput: Apply LogicState: LogicModel LogicWaveform: LogicOutput LogicInput WaveValue Measured: Contents Member: NameRef MiNoMax: Value MustJoin: Contents Interface Name: Member NameRef NameRef: Reference ReferenceAux NameRefs: LogicOutput LogicInput PortListAlias ForEach NameRefsAux: NameRefs NonPermutable: NonPermutable Permutable Number: WFF Apply WaveValue Stable RangeValue Value GridMap Scale NumberDefinition: Technology Optional: Keyword Orientation: Transform Pairwise: Arbitrate Parameter: Instance ParameterValue: Parameter ParameterValueAux: ParameterValue PathType: FigureGroupSpecification Permutable: NonPermutable Permutable Interface Place: Translate Plug: ArrayRelatedInfo Point: Annotate Arc Corner Circle Dot Rectangle Path Polygon PortImplementation: Interface PortInstance: Instance PortListAlias: Simulate PortMap: ViewMap Primitive: Expression PrimitiveData PrimitiveData: ParameterValue ParameterValueAux Default Property: Wire PortInstance Instance Circle OpenShape Shape Dot Rectangle Path Polygon PortImplementation Body Constraint View Property Design PropertyType: Property RangeValue: MiNoMax Redo: Level2Ctl Reference: References ReferencesAux Delay MustJoin WeakJoined Joined Unused InstanceMap PortMap Design SimulationMap ReferenceAux: Reference References: Instance ReferencesAux: References Rename: Instance Simulate View External Design Cell Define SimulationInfo Technology Library EDIF Repeat: Level1Ctl Required: Contents Result: LogicState Scale: NumberDefinition ScaledInteger: Number Primitive ScaleX: Transform ScaleY: Transform Section: Section Contents SignalGroup: FigureGroup Simulate: Interface SimulationInfo: Technology SimulationMap: Technology SimulationValue: SimulationInfo Socket: ArrayRelatedInfo SocketSet: Plug Stable: Timing StateMap: SimulationMap Status: View External Design Cell Library EDIF Step: Place Style: PathType Technology: Library TimeStamp: Written Timing: Interface Transform: Instance SocketSet Socket Transition: Delay Translate: Transform True: Boolean PrimitiveData TwoDArrayJoin: Contents Interface Type: Define Unconstrained: RangeValue Undefined: RangeValue UnitSystem: NumberDefinition UnitType: Type Scale Unused: Contents Interface UserData: LogicModel Contents ArrayRelatedInfo SignalGroup FigureGroup Apply Simulate Timing Interface InstanceMap PortMap ViewMap Cell FigureGroupSpecification FigureGroupDefault SimulationMap NumberDefinition Technology Library Written Status EDIF Value: Transition Data View: Cell ViewMap: Cell ViewType: View WaveValue: Simulate WeakJoined: MustJoin WeakJoined Joined Interface WFF: Result Condition WholeNumber: CriticalSignal Step Apply TwoDArrayJoin Member ArrayDefinition Coordinate Width: FigureGroupSpecification Wire: Contents Written: Status Form: Escape Redo Block Iterate Repeat UserData Identifier: WFF LogicOtherwise LogicModel Wire CriticalSignal Measured Required Global PortInstance Parameter Orientation Instance ArrayUse SignalGroup Justify Figure FigureGroupRef PortImplementation LogicWaveform WaveValue IgnoreValue PortListAlias Simulate Stable Transition Timing NonPermutable Permutable TwoDArrayJoin FunctionName Expression Assign Repeat ViewType View External PropertyType Property Design Name NameRefs NameRefsAux Cell ArrayDefinition DefineObject Type Direction Style FigureGroupSpecification StateMap Isolated Pairwise SimulationValue SimulationInfo UnitType UnitSystem Technology Library Rename Index KeyRef FormalValue Extra Optional Formal Keyword UserData Accounting EDIF Integer: TwoDArrayJoin Repeat ScaledInteger Number WholeNumber Primitive Color FillPattern BorderPattern FormalValue TimeStamp EDIFLevelName EDIFVersion String: Section Annotate Data Primitive FillPattern BorderPattern Rename KeyRef BuildName FormalValue Comment Accounting