DIRECTORY Core, CoreClasses, CoreOps, CoreProperties, IO, Rope; CoreClassesImpl: CEDAR PROGRAM IMPORTS CoreOps, CoreProperties, IO EXPORTS CoreClasses = BEGIN OPEN Core, CoreClasses; recordCellClass: PUBLIC CellClass _ NEW [CellClassRec _ [name: "Record", recast: NIL, properties: CoreProperties.Props[[CoreOps.printClassProcProp, NEW [CoreOps.PrintClassProc _ PropPrint]], [CoreOps.nameClassWireProcProp, NEW [CoreOps.NameWireProc _ FullNameInternalWire]]]]]; PropPrint: CoreOps.PrintClassProc = { RecordPrint[NARROW [data], out]; }; CreateRecordCell: PUBLIC PROC [public: Wire, internal: Wire, instances: LIST OF CellInstance, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [recordCell: CellType] = { data: RecordCellType; size: NAT _ 0; FOR list: LIST OF CellInstance _ instances, list.rest WHILE list#NIL DO size _ size+1; ENDLOOP; data _ NEW [RecordCellTypeRec[size]]; size _ 0; FOR list: LIST OF CellInstance _ instances, list.rest WHILE list#NIL DO data[size] _ list.first; size _ size+1; IF ~CoreOps.Conform[list.first.actual, list.first.type.public] THEN ERROR; ENDLOOP; data.internal _ internal; recordCell _ CoreOps.CreateCellType[recordCellClass, public, data, name, props]; }; GetCellInstanceName: PUBLIC PROC [instance: CellInstance] RETURNS [name: ROPE _ NIL] = { name _ NARROW [CoreProperties.GetCellInstanceProp[instance, CoreOps.nameProp]]; }; RecordPrint: PUBLIC PROC [recordCellType: RecordCellType, out: STREAM] = { IO.PutRope[out, "\nInternal wire:"]; CoreOps.FullNameWire[wire: recordCellType.internal, name: NIL, prop: internalFullName]; CoreOps.PrintWire[recordCellType.internal, out]; IO.PutF[out, "\n%g instances", IO.int[recordCellType.size]]; FOR i: NAT IN [0 .. recordCellType.size) DO firstActual: BOOL _ TRUE; instanceName: ROPE _ GetCellInstanceName[recordCellType.instances[i]]; EachWirePair: CoreOps.EachWirePairProc = { internalName: ROPE _ NARROW [CoreProperties.GetWireProp[from: actualWire, prop: internalFullName]]; subWires _ internalName = NIL; IF internalName#NIL THEN { IF NOT firstActual THEN out.PutChar[',]; firstActual _ FALSE; out.PutF[" %g: %g", IO.rope[NARROW [CoreProperties.GetWireProp[from: publicWire, prop: CoreOps.publicFullName]]], IO.rope[internalName]]; }; }; IF instanceName = NIL THEN instanceName _ ""; IO.PutF[out, "\nCellInstance %g: %g", [rope[instanceName]], [rope[CoreOps.GetCellTypeName[recordCellType.instances[i].type]]] ]; IO.PutRope[out, "\n Actual wire: "]; CoreOps.FullNameWire[recordCellType.instances[i].type.public]; IF CoreOps.VisitBinding[recordCellType.instances[i].actual, recordCellType.instances[i].type.public, EachWirePair] THEN out.PutF["*** Actual and Public do not conform\n"]; CoreProperties.PrintProperties[props: recordCellType.instances[i].properties, out: out, depth: 1]; ENDLOOP; }; CorrespondingActual: PUBLIC PROC [instance: CellInstance, public: Wire] RETURNS [actual: Wire _ NIL] = { EachWirePair: CoreOps.EachWirePairProc = { IF publicWire=public THEN {actual _ actualWire; quit _ TRUE}; }; [] _ CoreOps.VisitBinding[instance.actual, instance.type.public, EachWirePair]; }; internalFullName: PUBLIC ATOM _ CoreProperties.RegisterProperty[$CoreInternalWireFullName, CoreProperties.Props[[CoreProperties.propPrint, CoreProperties.PropDontPrint]]]; FullNameInternalWire: CoreOps.NameWireProc = { rct: RecordCellType _ NARROW [data]; CoreOps.FullNameWire[wire: rct.internal, prop: internalFullName]; }; transistorCellClass: PUBLIC CellClass _ NEW [CellClassRec _ [name: "Transistor", recast: NIL]]; CreateTransistor: PUBLIC PROC [args: TransistorRec] RETURNS [cellType: CellType] = { tranNames: ARRAY TransistorType OF ROPE _ ["nE", "pE", "nD"]; tranPublic: Wire _ CoreOps.WiresToWire[LIST[ CoreOps.CreateWire[name: "gate"], CoreOps.CreateWire[name: "ch1"], CoreOps.CreateWire[name: "ch2"] ]]; cellType _ CoreOps.CreateCellType[ class: transistorCellClass, public: tranPublic, data: NEW [TransistorRec _ args]]; }; identityCellClass: PUBLIC CellClass _ NEW [CellClassRec _ [name: "Identity", recast: IdentityRecast, properties: CoreProperties.Props[[CoreOps.printClassProcProp, NEW [CoreOps.PrintClassProc _ IdentityPrint]]]]]; CreateIdentity: PUBLIC PROC [cellType: CellType, name: ROPE, props: Properties _ NIL] RETURNS [identity: CellType] = { identity _ CoreOps.CreateCellType[ class: identityCellClass, public: CoreOps.CopyWire[cellType.public], data: cellType, name: name, props: props]; }; IdentityRecast: RecastProc = {new _ NARROW [new.data]}; IdentityPrint: CoreOps.PrintClassProc = { ct: CellType _ NARROW [data]; out.PutF["\nIdentity of %g", IO.rope[CoreOps.GetCellTypeName[ct]]]; }; unspecifiedCellClass: PUBLIC CellClass _ NEW [CellClassRec _ [name: "Unspecified"]]; END. vCoreClassesImpl.mesa Copyright c 1985 by Xerox Corporation. All rights reserved. Barth, October 2, 1985 11:28:58 am PDT Spreitzer, December 1, 1985 7:01:10 pm PST Bertrand Serlet December 3, 1985 1:28:33 am PST Pradeep Sindhu December 4, 1985 11:59:23 am PST Record Transistor CoreOps.CreateAtomWire[name: IF args.type=pE THEN "Vdd" ELSE "Gnd"] Identity Unspecified Κn– "cedar" style˜codešœ™Kšœ Οmœ1™˜>Kšžœqžœ4˜«Jšœb˜bKšžœ˜—Jšœ˜K˜—š Ÿœžœžœ(žœžœ˜hš  œ˜*Jšžœžœžœ˜=J˜—JšœO˜O˜J˜——šœžœžœŽ˜«J˜—š œ˜.Jšœžœ˜$JšœA˜AJ˜——šŸ ™ Kšœžœ žœ.žœ˜_K˜šŸœžœžœžœ˜TKšœ žœžœžœ˜=šœ'žœ˜,Jšœ!˜!Jšœ ˜ Jšœ˜JšœC™CJšœ˜—šœ"˜"Jšœ˜Jšœ˜Jšœžœ˜"—Kšœ˜——šŸ™šœžœ žœzžœ.˜ΤK˜—š Ÿœžœžœžœžœžœ˜všœ"˜"Kšœ˜Kšœ*˜*Kšœ˜Kšœ˜—Kšœ˜—K˜š œžœ ˜7K˜—š  œ˜)Jšœžœ˜Jšœžœ$˜CJšœ˜——šŸ ™ Kšœžœ žœ(˜T—K˜Kšžœ˜K˜—…—lP